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# CPU Server Physical Design Methodology, Infrastructure and Automation Engineer

- **Company:** Qualcomm
- **Location:** Santa Clara, CA, United States (Remote available)
- **Experience:** Expert
- **Salary:** $142,200.0 - $213,400.0
- **Contract:** Permanent contract
- **Skills:** HTML, Computer-Aided Design, Artificial Intelligence, Systems Engineering, Cascading Style Sheets (CSS), Computer Programming, Computer Engineering, Perl (Programming Language), Python (Programming Language), Software Engineering, Tcl (Programming Language), Scripting, Information Technology, Power Analysis (Cryptography), Data Analytics, Physical Design
- **Published:** July 9, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=2a089a3dc50c8938

## About the Role

* Experience with Synthesis, place and route and signoff timing/power analysis.
 * Proficiency in scripting (TCL, Python, Perl, CSS, HTML, JS, CGI), * MS degree in Electrical Engineering; 10 years of practical experience
 * Understanding of industry standard tools for synthesis, place & route, STA and design signoff.
 * Data analytics skills to identify and root cause design bottlenecks, scripting and providing visual aids using AI-assisted utilities and models.
 * Good software and programming skills to represent complex data metrics for productivity enhancement and scalability, * Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience., Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
OR
PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.

## Description

As a CPU Physical Design Infrastructure and Automation Engineer, you will work with implementation and CAD teams to implement infrastructure improvements and automation needs for next generation CPUs., * Work with cross functional teams (PD, CAD, Methodology and STA) to bring up design infrastructure and dashboards for multiple CPU designs and domains.

 * Work with all block level implementation teams to analyze, implement and improve the optimization method as it pertains to the designs.
 * Work on developing new prediction models and automation for quick timing, power and area estimation.


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