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# FPGA/VHDL Digital Engineer Level 3

- **Company:** Indotronix International Corporation
- **Location:** San Diego, CA, United States
- **Experience:** Experienced
- **Contract:** Permanent contract
- **Skills:** Agile Methodology, Systems Engineering, Communications Protocols, Software Debugging, Programming Tools, Electronic Design Automation, Ethernet, Firmware, Field-Programmable Gate Array (FPGA), PCI Express, Software Requirements Analysis, System on a Chip, Universal Asynchronous Receiver/Transmitter, VHSIC Hardware Description Language (VHDL), Vivado, Serial Peripheral Interface
- **Published:** July 9, 2026
- **Apply:** https://www.clearancejobs.com/jobs/9018670/fpgavhdl-digital-engineer-level-3

## About the Role

* Design, develop, integrate, and test VHDL-based digital designs for end-user customers and businesses, primarily focused on software-defined radio FPGA firmware.
 * Develop FPGA firmware using industry-standard FPGA programming tools and development environments.
 * Collaborate with Systems Engineering, Digital Engineering, Hardware, and Integration & Test teams.
 * Work in both Waterfall and Agile software development environments.
 * Analyze system concepts of operation, requirements, and design documentation to resolve functional, performance, and timing issues.

 * Bachelor's Degree in a STEM discipline with 5+ years of related experience, or Master's Degree with 3+ years of related experience.
 * Significant hands-on experience with VHDL design.
 * Working knowledge of formal engineering development processes.
 * Experience with VHDL design and verification.
 * Strong written and verbal communication skills.
 * Ability to work independently and collaboratively in a team environment.

 * 8+ years of professional technical experience.
 * Experience with VHDL design and OSVVM verification for FPGA firmware.
 * Experience with AMD/Xilinx FPGA families, including Zynq, Kintex, Ultrascale, and Versal devices.
 * Experience with communication protocols including I2C, SPI, UART, PCIe, and Ethernet.
 * Experience with EDA tools such as Vivado, Quartus, and QuestaSim.
 * Knowledge of FPGA physical constraints and timing closure.
 * Experience developing test benches and supporting formal VHDL verification.
 * Experience performing board- or system-level debugging using oscilloscopes and logic analyzers.
 * Experience translating system requirements into programmable logic requirements, design documentation, and test specifications.
 * Hands-on experience with DoD communication systems.



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