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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior Digital Engineer - **Company:** Renesas Electronics America Inc. - **Location:** Chandler, AZ, United States (Remote available) - **Experience:** Expert - **Contract:** Permanent contract - **Skills:** Communications Protocols, Computer Engineering, Microarchitecture, Data Conversion, Software Debugging, Software Design Documents, Digital Electronics, Logic Synthesis of Circuits, Formal Verification, Static Timing Analysis, SystemVerilog, Systems Integration, Test Case, Verilog, Application Specific Integrated Circuits, Information Technology, Power Analysis (Cryptography) - **Published:** July 11, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=d132a0c7118578d7 ## About the Role * >5 years of digital design experience in one of the following areas: wireless handheld, data conversion, and power management. * Degree-level qualification in Electrical Engineering, Electronics, Computer Engineering, Computer Science, or a related discipline. * Fluent in Verilog / SystemVerilog RTL for digital CMOS circuit design. * Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools. * Strong understanding of block-level & chip-level verification techniques. * Strong & proven ability to debug both RTL & gate-level simulations. * Mandatory competence in written and verbal English. * Willingness to travel domestically or internationally on short notice. * Ability to work independently and collaboratively. * Preferred: experience with mixed-signal design methodologies. * Preferred: experience developing design constraints and hand-off to P&R. * Preferred: experience with STA and timing closure. * Preferred: experience with low-power design techniques, including clock and power gating (UPF). * Preferred: experience with power analysis and optimization. * Preferred: experience with advanced verification methodologies (UVM). * Preferred: experience with industry-standard protocols such as AMBA or I2C. ## Description * Interpret high level requirements to architect, design & integrate low-power digital circuits for mixed-signal data conversion and power management products in advanced process nodes. * Support full product lifecycle from concept to mass-production; communicating closely with wider organization through the various stages of silicon development. * Work closely with Analog and Verification engineers to deliver high-quality silicon solutions. * Ensuring digital development process is state-of-art and achieves budget, schedule, and project deliverable goals. * Designing digital RTL that meets timing, area, power and any adhering standards specifications. * Integrating design at the top level and running block & top-level simulations. * Participate in all aspects of Mixed-signal design flow - Micro-architecture, Design partitioning, RTL Verilog / SystemVerilog Design, Generating Timing Constraints, Synthesis, Interaction with P&R Team, Timing Analysis, LINT, CDC, RDC, UPF. * Working closely with P&R team to generate a layout that meets timing, area, and power requirements. * Support DFT strategy and implementation, and review test case development. * Assisting with top level test-bench debug, and running RTL & gate level simulations * Working with analog and digital verification engineers to come up with complex test scenarios for pre-silicon verification. * Supporting analog team to develop AMS, SystemVerilog or Verilog-real behavioral models. * Developing detailed block & chip level design documents and collateral. * Holding and participating in key design reviews and completion of various checklists. * Perform silicon evaluation as required. * Document device errata, develop work-around solutions, implement engineering changes when necessary. ## Related Videos - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [AIQSpecFlow: Improves and automates your agile process of specification and creation of testcases.](https://www.wearedevelopers.com/videos/100084-aiqspecflow-improves-and-automates-your-agile-process-of-specification-and-creation-of-testcases) - [The Billion Dollar Machine: First Time Right.](https://www.wearedevelopers.com/videos/393-the-billion-dollar-machine-first-time-right) - [AI as a Test Designer: Transforming Experience into Automated Testing](https://www.wearedevelopers.com/videos/1984-ai-as-a-test-designer-transforming-experience-into-automated-testing) - [Breaking the Hardware Mindset: Overcoming Barriers to System-Level Innovation](https://www.wearedevelopers.com/videos/1635-breaking-the-hardware-mindset-overcoming-barriers-to-system-level-innovation) - [Treat yourself - A tale about dog training and test-driven development](https://www.wearedevelopers.com/videos/446-treat-yourself-a-tale-about-dog-training-and-test-driven-development) ## Related Articles - [Fully Remote Software Engineer Jobs](https://www.wearedevelopers.com/magazine/447-fully-remote-software-engineer-jobs) - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated) - [What’s the Difference between a Junior, Mid, and Senior Developer?](https://www.wearedevelopers.com/magazine/238-what-s-the-difference-between-a-junior-mid-and-senior-developer) - [Top-Paying Tech Jobs (with Salaries)](https://www.wearedevelopers.com/magazine/372-top-paying-tech-jobs-with-salaries) - [Where to Find Entry-Level Software Engineering Jobs](https://www.wearedevelopers.com/magazine/397-where-to-find-entry-level-software-engineering-jobs) - [How software is steering vehicle technology](https://www.wearedevelopers.com/magazine/515-how-software-is-steering-vehicle-technology)