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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Remote - **Company:** MAG 24 LLC - **Location:** New York, NY, United States (Remote available) - **Salary:** $135,200.0 - $197,600.0 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Systems Engineering, Computer Engineering, System Configuration, Microarchitecture, Software Debugging, Digital Electronics, Data Flow Control, Formal Verification, Open Source Technology, PCI Express, Subsystems, System on a Chip, SystemVerilog, Verilog, Application Specific Integrated Circuits, Fpga Hardware, Information Technology, Hardware Debugging - **Published:** July 13, 2026 - **Apply:** https://www.careerjet.com/jobad/usfee86cafd88ce422c073d9accb7634f0 ## About the Role * Hands-on experience in ASIC or SoC design, functional verification, formal verification, or related semiconductor engineering work * Practical exposure to production silicon, tapeout, IP integration, bring-up, or coverage closure * Strong fluency in SystemVerilog or Verilog * Experience building, reviewing, or debugging RTL and verification environments * Solid understanding of subsystem and SoC-level engineering concerns * Strong written communication and the ability to explain complex hardware decisions clearly * Availability to contribute approximately 20-40 hours per week depending on project scope * Current location in the United States Educational Background * A degree in electrical engineering, computer engineering, computer science, physics, or a related technical field is helpful * Current doctoral study, graduate-level research, or professional semiconductor engineering experience is highly relevant * New graduates with strong practical project experience and senior engineers with production silicon backgrounds are encouraged to apply * Equivalent hands-on experience in chip design, verification, FPGA development, or hardware systems engineering is also highly valuable Nice to Have * Experience with RTL design, microarchitecture, IP integration, or subsystem development * Familiarity with NoC, PCIe, DDR, ARM, AXI, handshaking, backpressure, and clock-domain crossing * Experience with UVM, SVA, CocoTB, formal verification, coverage closure, or testbench architecture * Familiarity with Synopsys VCS, Cadence Xcelium, Siemens Questa, VC Formal, Verdi, or comparable industry tools * Experience with Icarus Verilog, Verilator, Yosys, OpenROAD, or other open-source hardware toolchains * Knowledge of PPA optimization, timing closure, synthesis, or analog and mixed-signal design verification * Previous experience with AI evaluation, technical benchmarking, or structured model assessment ## Description We are sharing a specialised part-time consulting opportunity for digital hardware professionals experienced in ASIC and SoC engineering, RTL development, functional verification, hardware debugging, testbench architecture, and production silicon workflows. This role supports a remote collaboration focused on improving how advanced AI systems understand and evaluate real-world semiconductor engineering work. Selected professionals will apply their practical hardware expertise to develop realistic chip design and verification problems, create rigorous reference solutions, assess technical outputs, identify subtle engineering failures, and contribute to high-quality evaluation workflows., Hardware Problem Development * Design realistic chip engineering problems based on practical ASIC, SoC, RTL, debugging, or verification experience * Develop tasks reflecting production-level engineering scenarios rather than textbook exercises * Create problems involving subsystem behavior, interface protocols, multi-module dataflow, timing, coverage, and system configuration * Calibrate technical difficulty and expected outcomes against real hardware engineering standards RTL, Testbench & Reference Solution Creation * Develop reference RTL, testbenches, assertions, and supporting technical materials * Work with SystemVerilog, Verilog, and relevant verification methodologies * Produce clear solution paths covering design intent, implementation decisions, and expected behavior * Review technical artifacts for correctness, completeness, readability, and engineering rigor Technical Evaluation & Debugging * Evaluate technical outputs across design, verification, debugging, formal analysis, and implementation workflows * Identify incorrect assumptions, protocol violations, timing issues, coverage gaps, and RTL defects * Assess whether proposed solutions reflect practical semiconductor engineering judgment * Explain technical failures clearly and document how an experienced engineer would improve the approach Quality Calibration & Collaboration * Collaborate with other hardware professionals to maintain consistent standards of rigor and difficulty * Review peer-created problems, reference solutions, testbenches, and evaluation criteria * Apply structured assessment frameworks across different hardware engineering domains * Communicate technical findings clearly while working independently in a remote environment ## Related Videos - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [10M Data Records Lost, Underwater Computing, and Psychedelic Fish - Matthias Geniar](https://www.wearedevelopers.com/videos/1908-10m-data-records-lost-underwater-computing-and-psychedelic-fish-matthias-geniar) - [Code to Road in < 12 hours](https://www.wearedevelopers.com/videos/1082-code-to-road-in-12-hours) - [Develop on Windows, Deploy on Red Hat Enterprise Linux](https://www.wearedevelopers.com/videos/1600-develop-on-windows-deploy-on-red-hat-enterprise-linux) - [Hiring AI Native Talents](https://www.wearedevelopers.com/videos/100268-hiring-ai-native-talents) - [Data-Oriented Programming - Version 1.1](https://www.wearedevelopers.com/videos/1634-data-oriented-programming-version-1-1) ## Related Articles - [Fully Remote Software Engineer Jobs](https://www.wearedevelopers.com/magazine/447-fully-remote-software-engineer-jobs) - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline) - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated) - [Dev Digest 120 - Apple and peers](https://www.wearedevelopers.com/magazine/455-dev-digest-120-apple-and-peers) - [Résumé-Driven Development: How IT trends affect the job market for software developers](https://www.wearedevelopers.com/magazine/59-resume-driven-development-how-it-trends-affect-the-job-market-for-software-developers) - [Find a Developer Job: 12 Best Job Sites For Developers](https://www.wearedevelopers.com/magazine/165-find-a-developer-job-12-best-job-sites-for-developers)