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# Hardware/Software Design Engineer 3

- **Company:** Wyetech LLC
- **Location:** Annapolis, MD, United States
- **Experience:** Expert
- **Salary:** $153,795.0 - $208,270.0
- **Contract:** Permanent contract
- **Skills:** C++ (Programming Language), Linux, Field-Programmable Gate Array (FPGA), Hardware Design, Signal Processing, Software Engineering, Vivado, Fpga Hardware
- **Published:** July 14, 2026
- **Apply:** https://www.clearancejobs.com/jobs/9027237/hardwaresoftware-design-engineer-3

## About the Role

* TS/SCI with agency appropriate poly
 * Bachelor's degree plus 8-years of relevant experience or equivalent.

Required Technical Skills

 * Strong experience required for FPGA coding, Digital Signal Processing theory & application, Interfacing FPGA code with existing code bases and software; Knowledge of signal processing blocks and related DSP components, Linux OS, coding ability in C and C++

Desired Technical Skills

 * Additional experience with Vivado required; experience with Epiq Solution PDK preferred

## Description

Seeking an experienced senior HW/SW Design Engineer to join a small team to design, develop, construct, and test electronic hardware (FPGA) and software processing components for subsystems supporting RF communication and collection systems. This position requires expertise in FPGA development, digital signal processing implementation, and software-hardware integration to support mission critical requirements. The contractor will lead technical design efforts, implement DSP algorithms and associated technical components in FPGA hardware, integrate with existing Linux code bases, bridge FPGA to software stack connection, plus document those efforts. This role combines hardware design responsibilities (FPGA RTL development, timing closure, resource optimization) with software development (integration code, system-level software) to deliver complete subsystem solutions.

Due to federal contract requirements, United States Citizenship and position appropriate security clearance is required. (e.g. Active TS/SCI security clearance with agency appropriate polygraph).

Capabilities

 * Candidate is expected to implement DSP and associated technical components in FPGA for code base integration.


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