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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior FPGA Engineer - **Company:** INVERSION LLC - **Location:** Marina del Rey, CA, United States - **Experience:** Expert - **Salary:** $137,000.0 - $221,000.0 - **Contract:** Permanent contract - **Skills:** Board Bringup, C (Programming Language), C++ (Programming Language), Computer Engineering, Data Transmissions, Software Debugging, Digital Architecture, Digital Technology, Linux on Embedded Systems, Ethernet, Formal Verification, Field-Programmable Gate Array (FPGA), Hardware-In-The-Loop Simulation, Python (Programming Language), MATLAB, PCI Express, E2e Testing, Signal Processing, Software Requirements Analysis, Specman, Static Timing Analysis, SystemVerilog, Systems Integration, Universal Asynchronous Receiver/Transmitter, Verilog, VHSIC Hardware Description Language (VHDL), Digital Access Carrier System, Serial Peripheral Interface, Fpga Hardware, Hardware Testing, Low Latency, Bare Metal, Physical Design, Hardware Debugging - **Published:** July 15, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=f6a4fc07e0563cbd ## About the Role * Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Physics, or a related technical field. * Typically 5+ years of professional experience in FPGA design and development for high-speed digital, communications, or signal processing systems. * Ability to obtain and maintain a U.S. security clearance up to Top Secret. * Strong experience with VHDL, Verilog, and/or SystemVerilog. * Familiarity with Xilinx, AMD, Intel/Altera, or equivalent FPGA toolchains and development environments. * Experience developing FPGA-based architectures for high-speed, real-time signal processing systems. * Experience with digital communications and common interface protocols. * Strong understanding of high-speed digital interfaces such as JESD204, PCIe, Ethernet, SPI, UART, and related protocols. * Experience with simulation, synthesis, timing analysis, timing closure, resource optimization, and hardware debugging. * Familiarity with MATLAB/Simulink, Python, C, or C++ for algorithm handoff, modeling, verification, or automation. * Understanding of hardware/software integration and board bring-up. * Hands-on experience with lab equipment such as logic analyzers, oscilloscopes, and spectrum analyzers. * Ability to communicate technical architecture and design tradeoffs clearly across multidisciplinary teams. Desired Qualifications: * Experience with RF, telemetry, SDR, or communications systems. * Experience implementing digital downconversion/upconversion, filtering, channelization, packetization, synchronization, or other DSP functions in FPGA fabric. * Familiarity with processor/FPGA co-design and embedded Linux or bare-metal control interfaces. * Experience with high-speed ADC/DAC interfaces and board-level integration in mixed-signal systems. * Familiarity with verification methodologies, constrained-random simulation, hardware-in-the-loop testing, or automated regression infrastructure. * Experience supporting qualification, environmental test, and deployment of hardware in aerospace, defense, or other high-reliability applications. * Experience in startup environments or small, highly collaborative engineering teams. Additionally: Staff-Level Consideration - We are also open to considering exceptional candidates for a Staff FPGA Engineer level. Staff-level candidates should possess all of the qualifications listed above, in addition to 8+ years of professional experience with demonstrated technical leadership in FPGA architecture, implementation, and system integration. The Staff-level compensation range is $161,000 - $221,000. ## Description As a Senior FPGA Engineer, you will lead the design, implementation, integration, and verification of FPGA-based architectures supporting Inversion's next-generation re-entry vehicles. You will work within the Avionics team to develop high-performance digital systems for RF, communications, telemetry, and real-time signal processing applications across both flight and ground hardware. This role is ideal for an experienced engineer who can translate system requirements and signal processing concepts into robust FPGA implementations, while driving hardware bring-up, verification, and end-to-end integration across multidisciplinary teams. You will help develop critical hardware and systems for cutting-edge maneuverable reentry vehicles - advancing one of the most capable reentry vehicle platforms ever developed. You will be a key member of the Avionics team, reporting directly to the Director of Engineering, Avionics. Our engineers are responsible for the complete lifecycle of the hardware they create, including design, development, integration, verification, and troubleshooting., * Design, implement, and verify FPGA-based processing architectures for RF, DSP, telemetry, and real-time embedded applications. * Translate signal processing, communications, and control algorithms into efficient FPGA implementations. * Develop interfaces between FPGAs, ADCs/DACs, processors, RF front ends, memories, and other digital subsystems. * Own FPGA development flow including architecture definition, RTL design, simulation, synthesis, place-and-route, timing closure, and hardware validation. * Optimize FPGA designs for latency, throughput, resource utilization, power, and reliability. * Develop reusable IP, testbenches, and verification infrastructure to support current and future platform development. * Support board bring-up, integration, debug, and troubleshooting in laboratory and field test environments. * Partner closely with DSP, RF, software, embedded, and electrical engineers to ensure end-to-end system performance. * Support hardware/software co-design and system-level integration across flight and ground systems. * Document architecture, design decisions, verification results, and integration procedures. ## Related Videos - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Leveraging Large Language Models for Legacy Code Translation: Challenges and Solutions](https://www.wearedevelopers.com/videos/1157-leveraging-large-language-models-for-legacy-code-translation-challenges-and-solutions) - [Building a hypercar from scratch](https://www.wearedevelopers.com/videos/607-building-a-hypercar-from-scratch) - [Your next 10x engineer isn't in your city. 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