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# Early Career - SoC Digital Design Engineer

- **Company:** Apple Firmenprofil
- **Location:** München, Germany
- **Contract:** Permanent contract
- **Skills:** C (Programming Language), C++ (Programming Language), Computer Programming, Microarchitecture, Logic Synthesis of Circuits, Perl (Programming Language), Formal Verification, Python (Programming Language), System on a Chip, SystemVerilog, Tcl (Programming Language), Verilog, Backend, Physical Design
- **Published:** May 25, 2026
- **Apply:** https://de.indeed.com/viewjob?jk=a8f961eebdf622d3

## About the Role

Do you have experience in Verilog?, Experience with scripting and programming languages with some of the following: Python, Perl, C, C++, and TCL is an advantage.
Familiar with the various backend tools (synthesis and STA) - an advantage.
Familiar with verification methodologies - an advantage.
Microarchitecture definitions at the unit level, You hold an MSEE.
Ability to fluently speak and write in English.
You should have some experience in silicon design
RTL coding, block-level simulations, and synthesis
Verilog / System Verilog skills

## Description

As a SoC Digital Design Engineer, you will have responsibilities spanning all aspects of the SoC design flow.","responsibilities":"Work with the architecture team to develop the microarchitecture spec.
Develop RTL for one or more blocks following established design guidelines based on microarchitecture spec.
Work on sophisticated design practices (Clock/Reset/Voltage domain crossing, DFT, Low Power Design, power optimisation, and synthesis).
Work closely with the verification team on block/top level to ensure timely delivery of quality designs.
Work closely with the physical design team to optimize the design and meet design targets (area, timing, and power).


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