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# ASIC Design Verification Engineer (Hardware Security)

- **Company:** Qualcomm
- **Location:** Santa Clara, CA, United States (Remote available)
- **Experience:** Experienced
- **Salary:** $153,200.0 - $229,800.0
- **Contract:** Permanent contract
- **Skills:** Microarchitecture, Software Debugging, Logic Synthesis of Circuits, Microprocessors, Hardware Security Module, Subsystems, System on a Chip, Verilog, Application Specific Integrated Circuits, Peripherals
- **Published:** July 17, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=19135cb52364e1b5

## About the Role

* Bachelor's degree in electrical engineering, or related Sciences
 * 6+ years of experience in ASIC design
 * Experience and understanding of ASIC design flow: Architecture, Microarchitecture, verilog/system-verilog RTL design, Clock Domain Crossings, DFT, synthesis, and timing closure
 * Knowledge of bus protocols, clocks/resets, debug concepts
 * Problem solving, strong communication and teamwork skills
 * Self-driven, motivated, able to work with minimum supervision

Stand out of the crowd:

 * Experience with microcontroller CPUs, Busses (AHB/AXI/others), or Peripherals
 * Experience with system level architecture, complex subsystems, integration of analog and digital IP, implementation techniques, silicon test
 * Experience with High-speed, Low Area, and Low Power architecture
 * Experience in hardware security fields like Root of Trust, RNG, symmetric and asymmetric crypto, side-channel, error correction codes, hardening, etc
 * Experience in verification, modeling, test-planning

Education Requirements

 * Bachelor's degree minimum, Master's or PhD preferred.

Keywords:

SoC (system on chip), Security, ASIC, Digital Design, Crypto, Cryptography, Encryption, side-channel, subsystem, lead, * Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience., Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.



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