> Markdown version of [/jobs/ext/1321669-fpga-network-engineer](https://www.wearedevelopers.com/jobs/ext/1321669-fpga-network-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # FPGA/Network Engineer - **Company:** Osprey Technologies, LLC - **Location:** Plano, TX, United States - **Salary:** $36,000.0 - $60,000.0 - **Contract:** Permanent contract - **Skills:** Boolean Algebra, Command-Line Interface, Computer Networks, Data Centers, Software Debugging, Linux, Hard Disk Drives, Field-Programmable Gate Array (FPGA), IP Addressing, Network Troubleshooting, Networking Cables, Performance Tuning, Software Deployment, Systems Integration, Verilog, VHSIC Hardware Description Language (VHDL), Vivado, High Performance Computing, Fpga Hardware, Information Technology, Hardware Infrastructure - **Published:** July 17, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=f7f7f31b8e61506b ## About the Role * Bachelor's degree in Electronic Engineering, Electrical Engineering, Computer Science, or a related field. * Working knowledge of FPGA programming (Verilog/VHDL and/or HLS) and digital logic design. * Basic knowledge of computer/server hardware (assembly, component identification, common troubleshooting). * Basic understanding of computer networking (IP addresses, network cables, switches, connectivity testing). * Careful, detail-oriented, responsible, and hardworking., * Experience with high performance computing (HPC) environments or large-scale compute infrastructure. * Experience working in a data center, lab, or computer assembly/maintenance workshop. * Familiarity with basic Linux / command line commands. * Hands-on experience with FPGA toolchains (e.g., Xilinx Vivado) or embedded hardware. ## Description We are looking for an FPGA/Network Engineer to work at our lab specializing in FPGA bringup, high performance computing (HPC), and server systems. The role focuses on FPGA programming and system integration, monitoring and ensuring stable server operation, and handling hardware and network issues. This position is a good fit for someone with a strong technical foundation who is careful, hardworking, and enjoys hands-on work with computing and FPGA hardware, * Design, develop, and debug FPGA programming/logic (RTL/Verilog/VHDL or HLS) to support bringup and production workloads. * Support and optimize high performance computing (HPC) infrastructure, including compute cluster configuration and performance tuning. * Monitor the operating status of servers (temperature, load levels, running state) and detect early signs of abnormalities. * Inspect and troubleshoot network issues: connectivity, network cabling, switches, and connection drops. * Lead the FPGA bringup process, including assembly, cable connections, and server hookups, following technical specifications. * Install and replace hardware components: cooling fans, cables, hard drives, RAM, and related parts. * Perform regular cleaning and maintenance of equipment and the work area to ensure proper cooling and safety. * Collaborate with the technical team on hardware and software setup, testing, and validation. * Keep operation logs and report equipment status and incidents to the manager. ## Related Videos - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Docker network without Docker](https://www.wearedevelopers.com/videos/1418-docker-network-without-docker) - [An Applied Introduction to eBPF with Go](https://www.wearedevelopers.com/videos/1075-an-applied-introduction-to-ebpf-with-go) - [Docker exec without Docker](https://www.wearedevelopers.com/videos/1094-docker-exec-without-docker) - [Discover the open source trio you didn’t expect: .NET and PostgreSQL on Linux](https://www.wearedevelopers.com/videos/2042-discover-the-open-source-trio-you-didn-t-expect-net-and-postgresql-on-linux) - [Photonic Computing: Programming a New Class of AI Accelerators (incl. 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