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# SoC Digital Verification Engineer

- **Company:** Apple Firmenprofil
- **Location:** München, Germany
- **Contract:** Permanent contract
- **Skills:** C (Programming Language), C++ (Programming Language), Computer Engineering, Perl (Programming Language), SystemVerilog, Tcl (Programming Language), Verilog, Information Technology, Hardware Acceleration, Formal Methods
- **Published:** May 29, 2026
- **Apply:** https://de.indeed.com/viewjob?jk=c27093c8350c431a

## About the Role

Do you have experience in Verilog?, Do you have a Master's degree?, Hands-on experiences in SoC verification.
Knowledge of SoC architecture/design and in-depth knowledge of verification flow.
Strong understanding and proven experience in the sophisticated verification process, including dynamic, coverage-based and formal methods.
Experience using some of the following: Perl, e, Verilog, System Verilog, C, C++, TCL.
Familiarity with verification environments e.g. UVM, System Verilog is an advantage.
Knowledge in formal, hardware acceleration is a plus., You should have a BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or equivalent experience.
Ability to fluently speak & write in English.

## Description

As the SoC Verification Engineer, we are responsible for taking part in a SoC verification process of a large scale SoC. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices - strengthening our dedication to leave the world better than we found it.

Join us!","responsibilities":"As a member of the verification team you will develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors. You will apply sophisticated techniques to achieve verification with the highest quality, efficiency, and time-to-market You are going to work closely with the design team to ensure timely delivery of quality designs You will also work with methods to accelerate verification time You will also be involved in Post Silicon Validation


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