> Markdown version of [/jobs/ext/134255-senior-design-engineer-pathfinding](https://www.wearedevelopers.com/jobs/ext/134255-senior-design-engineer-pathfinding). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior Design Engineer, Pathfinding - **Company:** Micron Technology, Inc. - **Location:** Folsom, CA, United States - **Experience:** Expert - **Salary:** $93,000.0 - $198,000.0 - **Contract:** Permanent contract - **Skills:** Analog Electronics, Unix, Software Debugging, Dynamic Random-Access Memory, Non-Volatile Memory, Simulation Software, Verilog, Sender Policy Framework (SPF), Modeling and Simulation - **Published:** May 19, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=ff682cc0eaba750d ## About the Role * 3+ years of demonstrated experience in mix-signal, digital, or analog IC design and development for volatile or nonvolatile memory technology. * Proven experience in IC design with exposure to Regulator, Charge Pump, Oscillator, Current reference, Bandgap, and Comparator design experience is required. * Exposure to modeling and simulation of ICs using SPICE and Verilog. * 3+ years of demonstrated ability in communicating with technical and non-technical team members across a large organization. * BSEE or MSEE in Electrical Engineering with a minimum of 8 years of relevant Semiconductor Manufacturing experience, * MSEE + 3 years' post-graduate mix-signal or analog IC design experience * 3+ years of exposure to circuit debugging in collaboration with other engineering teams. * Proficiency with UNIX and CADENCE design environment (Simulation, Schematic entry, SPF extraction). ## Description As a Design Engineer in Micron's Pathfinding Design Team, you will play a key role in shaping next-generation memory technologies. This position involves contributing to array architecture definition and analysis, as well as the design of analog, basic digital, and mixed-signal circuits for advanced memory technologies including DRAM and Emerging memories. You will work on novel concept development, circuit simulation, optimization, and floor planning to enable groundbreaking memory solutions!, * Contribute to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits * Perform circuit modeling, sensitivity analyses, and assist in developing validation through widely recognized simulation software and tools * Design on-silicon test chips and lead required tape-out revisions * Coordinate and collaborate with the layout team, including floor-planning, placement, and routing * Perform verification processes with modeling and simulation using industry-standard simulators ## Related Videos - [WeAreDevelopers LIVE - Node and Package Security](https://www.wearedevelopers.com/videos/2138-wearedevelopers-live-node-and-package-security) - [The Billion Dollar Machine: First Time Right.](https://www.wearedevelopers.com/videos/393-the-billion-dollar-machine-first-time-right) - [The Time Paradox: Building Timezone-Safe Python/Django Applications](https://www.wearedevelopers.com/videos/1915-the-time-paradox-building-timezone-safe-python-django-applications) - [Strange New Worlds: shaping the future of the digital age](https://www.wearedevelopers.com/videos/677-strange-new-worlds-shaping-the-future-of-the-digital-age) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Coffee with Developers - Robby Russell](https://www.wearedevelopers.com/videos/917-coffee-with-developers-robby-russell) ## Related Articles - [Everything a Developer Needs to Know About MCP with Neo4j](https://www.wearedevelopers.com/magazine/604-everything-a-developer-needs-to-know-about-mcp-with-neo4j) - [Dev Digest 188: CfP time, the risks of NPM and IKEA algorithms](https://www.wearedevelopers.com/magazine/635-dev-digest-188-cfp-time-the-risks-of-npm-and-ikea-algorithms) - [Dev Digest 129 - Now that's what I call private data!](https://www.wearedevelopers.com/magazine/468-dev-digest-129-now-that-s-what-i-call-private-data) - [Data Science & more: The Lopez dilemma](https://www.wearedevelopers.com/magazine/10-data-science-more-the-lopez-dilemma) - [Dev Digest 120 - Apple and peers](https://www.wearedevelopers.com/magazine/455-dev-digest-120-apple-and-peers) - [Dev Digest 118 - not a total recall](https://www.wearedevelopers.com/magazine/452-dev-digest-118-not-a-total-recall)