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# System Verification Engineer

- **Company:** NVIDIA Ltd.
- **Location:** Santa Clara, CA, United States
- **Experience:** Experienced
- **Salary:** $136,000.0 - $218,500.0
- **Contract:** Permanent contract
- **Skills:** C++ (Programming Language), Computer Engineering, Perl (Programming Language), Ethernet, Python (Programming Language), PCI Express, Verification and Validation (Software), SystemVerilog, Universal Asynchronous Receiver/Transmitter, Verilog, VHSIC Hardware Description Language (VHDL), Scripting, Information Technology
- **Published:** July 20, 2026
- **Apply:** https://www.juju.com/job/00000000ghzzyj

## About the Role

+ M.S or equivalent experience in Electrical Engineering, Computer Science, Computer Engineering or related field with 4+ years of proven experience.

 + Individual should be proficient in Verilog and/or VHDL, C/C++ and SystemVerilog.

 + Protocol knowledge of at least one of the High-speed interfaces: PCIe/CXL/NVLINK/IB/Ethernet etc.

 + Low-speed protocols like I2C/I3C/SPI/UART and BMC interaction in server platforms

 + Working Knowledge of CPU - GPU coherency, Prefer ARM CHI coherency protocol

 + Experience with UVM verification environments and scripting with Perl, Python and C/C++ is essential.

 + Be familiar with hierarchical design approach, top-down design, SoC and system level verification.

 + Zebu emulation experience with SOC/CPU



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