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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior FPGA Technical Lead - **Company:** QuEST Defense - **Location:** Colorado Springs, CO, United States (Remote available) - **Experience:** Expert - **Salary:** $166,400.0 - $187,200.0 - **Contract:** Temporary contract - **Skills:** Code Coverage, Communications Protocols, Computer Engineering, Software Debugging, Digital Electronics, Field-Programmable Gate Array (FPGA), Integrated Development Environments, Static Timing Analysis, VHSIC Hardware Description Language (VHDL), Fpga Hardware, Hardware Testing, Generative AI, Information Technology, Data Management, Physical Design - **Published:** July 22, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=bcb35c232d91eeb1 ## About the Role * U.S. citizenship required. * Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. * 5+ years of relevant FPGA design, verification, or certification experience in aerospace, defense, avionics, or another safety-critical engineering environment. * Strong hands-on experience with FPGA development using VHDL. * Strong understanding of Register Transfer Level design for FPGA applications. * Experience working within a DO-254 development and certification environment. * Experience with requirements-based design and verification practices for safety-critical digital hardware. * Knowledge of FPGA verification methods, including simulation, hardware testing, fault injection, and failure analysis. * Experience evaluating coverage metrics such as functional coverage, structural coverage, and robustness testing. * Familiarity with elemental analysis in support of DO-254 compliance. * Experience with FPGA design implementation activities such as synthesis, place and route, timing closure, design constraints, pin-out, and I/O timing analysis. * Ability to troubleshoot RTL design and verification issues using simulation environments and structured root cause analysis. * Ability to provide technical guidance, identify gaps, and work proactively with cross-functional engineering teams. * Self-motivated and comfortable working independently in a remote environment while maintaining strong communication with the project team. Preferred Qualifications: * Prior technical lead experience on FPGA, digital hardware, or DO-254 certification programs. * Experience supporting DAL-A FPGA or complex electronic hardware development. * Strong understanding of DO-254 certification expectations, audit readiness, and compliance artifact reviews. * Working knowledge of FAA AC 20-152A guidance or similar safety-critical compliance standards. * Experience leading or supporting certification reviews, design reviews, verification reviews, or artifact gap assessments. * Experience with safety-critical avionics programs for Collins Aerospace, RTX, or similar aerospace/defense organizations. * Experience with FPGA designs involving communication protocols, memory interfaces, processor interfaces, data management, or other complex digital functions. * Ability to quickly assess an existing FPGA design and verification baseline, identify risks, and help the team close gaps within a short-term project timeline. * Experience in the adoption and/or integration of emerging technologies (e.g., generative AI, automation platforms, digital assistants) into day-to-day operations for continuous improvement. Technologies, Tools & Methodologies * VHDL * FPGA design and verification * Register Transfer Level design * DO-254 compliance * FAA AC 20-152A guidance * Requirements-based design and verification * Elemental analysis ## Description The selected engineer will serve as a technical lead supporting FPGA design and verification activities for mission-critical aircraft systems. Responsibilities will include requirements-based design support, elemental analysis, coverage metrics review, simulation, hardware testing, fault injection, failure analysis, and certification artifact development. This role requires strong DO-254 expertise and the ability to guide technical execution, review artifacts, identify compliance gaps, and ensure design and verification activities align with certification expectations., * Serve as a technical lead for FPGA design, verification, and DO-254 certification-related activities. * Support safety-critical FPGA development using VHDL and RTL design practices. * Review and assess Register Transfer Level designs for FPGA implementation, verification readiness, and certification alignment. * Develop, review, and maintain DO-254 related documentation, including requirements, design descriptions, design specifications, traceability, verification evidence, and certification support artifacts. * Support requirements-based design and verification activities within a DAL-A or other safety-critical development environment. * Perform or support elemental analysis to ensure design elements are properly identified, verified, and traced to requirements. * Evaluate coverage metrics, including functional coverage, structural coverage, and robustness testing results. * Support FPGA verification methods including simulation, hardware testing, fault injection, and failure analysis. * Troubleshoot RTL design and verification issues using simulation environments, structured debug methods, and root cause analysis. * Support FPGA implementation activities including synthesis, place and route, timing analysis, I/O timing, design constraints, and pin-out considerations. * Identify technical and certification risks, communicate gaps clearly, and help drive practical solutions with the engineering team. * Collaborate with design, verification, systems, hardware, program, and certification stakeholders in a remote engineering environment. ## Related Videos - [Great DevEx and Regulatory Compliance - Possible?](https://www.wearedevelopers.com/videos/1426-great-devex-and-regulatory-compliance-possible) - [Mutation Testing and Fuzzing in C#](https://www.wearedevelopers.com/videos/703-mutation-testing-and-fuzzing-in-c) - [Your imaginations is (no longer) the limit: how Generative AI empowers people to be creative](https://www.wearedevelopers.com/videos/741-your-imaginations-is-no-longer-the-limit-how-generative-ai-empowers-people-to-be-creative) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Test-reduction - Doing more with less](https://www.wearedevelopers.com/videos/977-test-reduction-doing-more-with-less) - [The shadows that follow the AI generative models](https://www.wearedevelopers.com/videos/624-the-shadows-that-follow-the-ai-generative-models) ## Related Articles - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated) - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline) - [Should senior developers refuse interview coding challenges?](https://www.wearedevelopers.com/magazine/29-should-senior-developers-refuse-interview-coding-challenges) - [Fully Remote Software Engineer Jobs](https://www.wearedevelopers.com/magazine/447-fully-remote-software-engineer-jobs) - [Résumé-Driven Development: How IT trends affect the job market for software developers](https://www.wearedevelopers.com/magazine/59-resume-driven-development-how-it-trends-affect-the-job-market-for-software-developers) - [What’s the Difference between a Junior, Mid, and Senior Developer?](https://www.wearedevelopers.com/magazine/238-what-s-the-difference-between-a-junior-mid-and-senior-developer)