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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # HWIL FPGA Engineer - **Company:** Castelion Corporation - **Location:** United States - **Experience:** Expert - **Contract:** Permanent contract - **Skills:** Systems Engineering, Computer Engineering, Software Debugging, Field-Programmable Gate Array (FPGA), Design of User Interfaces, Hardware Design, Hardware Interface Design, Hardware-In-The-Loop Simulation, Integrated Development Environments, Real Time Simulation, Static Timing Analysis, Systems Architecture, SystemVerilog, Systems Integration, Verilog, VHSIC Hardware Description Language (VHDL), Fpga Hardware, Hardware Testing, Information Technology, Stream Processing, Hardware Debugging - **Published:** July 28, 2026 - **Apply:** https://www.dice.com/job-detail/c53ae6f5-2a95-4393-b9c0-e7681b8eec21 ## About the Role * Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline. * 5+ years of professional FPGA development experience. * Experience developing FPGA solutions using VHDL, Verilog, or SystemVerilog. * Experience with Xilinx/AMD FPGA platforms and associated development toolchains. * U.S. Citizenship required. Preferred Skills and Experience * Ability to generate RTL from HLS workflows while understanding and optimizing the resulting hardware implementation. * Strong understanding of FPGA development workflows including simulation, synthesis, implementation, timing closure, and hardware debugging. * Experience integrating FPGA designs with complex hardware interfaces and embedded systems. * Familiarity with hardware-in-the-loop (HWIL), processor-in-the-loop (PIL), or real-time simulation environments. * Experience supporting radar, RF, avionics, guidance, navigation, control, or aerospace systems. * Experience working with high-speed interfaces, real-time data processing, and deterministic hardware architectures. * Familiarity with laboratory integration, oscilloscopes, logic analyzers, and hardware debugging tools. * Ability to collaborate effectively across multidisciplinary engineering teams in a fast-paced development environment. * Active U.S. security clearance or the ability to obtain one is highly desired., While this position does not currently require a U.S government-issued security clearance, it may in the near future. Therefore, the ability to obtain and maintain a U.S. government-issued security clearance is required. ## Description As a HWIL FPGA Engineer, you will lead the FPGA architecture and development for Castelion's next-generation Hardware-in-the-Loop (HWIL) test capability. You will be a foundational member of a multidisciplinary team responsible for building a real-time test environment that enables rapid validation of hardware and algorithms before flight testing. Working alongside simulation, hardware, electrical, mechanical, software, and guidance engineers, you'll develop FPGA-based solutions that bridge high-fidelity 6-DOF simulation with physical hardware, ultimately enabling fully closed-loop testing in representative mission environments. This role is ideal for engineers who enjoy solving difficult real-time hardware challenges, working across multiple engineering disciplines, and building systems from the ground up. Responsibilities * Lead FPGA architecture, development, integration, and verification for Castelion's Hardware-in-the-Loop (HWIL) test system. * Develop FPGA solutions supporting real-time evaluation and closed-loop hardware testing. * Collaborate with simulation engineers to integrate high-fidelity 6-DOF models into FPGA-based HWIL architectures. * Design FPGA interfaces that integrate seamlessly with radar hardware, sensors, and supporting electronics. * Develop high-performance FPGA implementations using high-level synthesis tools while optimizing generated RTL where appropriate. * Participate in system architecture definition, interface development, and hardware design reviews. * Develop FPGA verification strategies including simulation, timing analysis, hardware validation, and laboratory integration. * Support bring-up, debugging, and optimization of FPGA hardware in laboratory environments. * Partner closely with electrical, mechanical, software, and systems engineers to rapidly iterate HWIL capabilities using a crawl, walk, run development methodology. * Contribute to the evolution of the HWIL system from early open-loop demonstrations to fully closed-loop representative mission testing. ## Related Videos - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Unleashing the Full Potential of the Arm Architecture – Write Once, Deploy Anywhere](https://www.wearedevelopers.com/videos/940-unleashing-the-full-potential-of-the-arm-architecture-write-once-deploy-anywhere) - [How to Domain Model – An example from manufacturing](https://www.wearedevelopers.com/videos/742-how-to-domain-model-an-example-from-manufacturing) ## Related Articles - [Top 6 Hackathons for Developers in 2023](https://www.wearedevelopers.com/magazine/263-top-6-hackathons-for-developers-in-2023) - [9 Ways to Make Money Hacking](https://www.wearedevelopers.com/magazine/333-9-ways-to-make-money-hacking) - [Why Attend a Developer Event in 2026?](https://www.wearedevelopers.com/magazine/688-why-attend-a-developer-event-in-2026) - [Dev Digest 132 - Binging WADFlix?](https://www.wearedevelopers.com/magazine/473-dev-digest-132-binging-wadflix) - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline) - [What Makes WeAreDevelopers World Congress Different From Every Other Tech Event?](https://www.wearedevelopers.com/magazine/701-what-makes-wearedevelopers-world-congress-different-from-every-other-tech-event)