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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior Staff Engineer Digital IC Build Flow and Methodology - **Company:** Marvell - **Location:** Santa Clara, CA, United States - **Experience:** Expert - **Salary:** $151,000.0 - $223,440.0 - **Contract:** Internship / Graduate position - **Skills:** Artificial Intelligence, C++ (Programming Language), Computer Programming, Computer Engineering, Software Debugging, Electronic Design Automation, Python (Programming Language), Shell Script, Software Engineering, System on a Chip, Tcl (Programming Language), Toolchain, Application Specific Integrated Circuits, Caching, Information Technology, Bots, Build Tools, Front End Software Development, GPT, Jenkins - **Published:** July 29, 2026 - **Apply:** https://diversityjobs.com/main/sendform/8/8/28176/1/16720605?backUrl=%2Fcareer%2F16720605%2FSenior-Staff-Engineer-Digital-Ic-Build-Flow-Methodology-California-Santa-Clara ## About the Role The ideal candidate combines strong software engineering skills with deep understanding of ASIC/SoC design workflows and EDA tooling and enjoys owning end-to-end infrastructure used daily by large design and verification teams., Bachelor's or Master's degrees in electrical engineering, Computer Engineering, Computer Science, or related field. 8+ years of experience in ASIC/SoC design, verification, or methodology roles. Strong programming skills in Python and at least one of TCL, C/C++, or shell scripting. Experience with make-based or graph-based build systems. Understanding of front-end chip design flows. Experience debugging large-scale infrastructure issues. Familiarity with EDA toolchains. Strong problem-solving and collaboration skills. Preferred Qualifications Experience with next-generation or programmable build flows. CI systems such as Jenkins. Multi-chip or chiplet-based designs. Bazel or similar dependency-graph build systems. ## Description We are seeking a Senior Engineer to architect, implement, and maintain scalable build scripts and front-end methodology for complex digital IC designs. This role focuses on improving compilation, elaboration, simulation, and regression flow across block, subsystem, and full-chip designs, with an emphasis on performance, correctness, and developer productivity., Design, implement, and maintain chip design build flows supporting block, subsystem, full-chip, and multi-chip simulations. Develop and own build scripts and orchestration logic for compile, elaborate, simulate, and regression workflows. Improve build performance through dependency analysis, incremental builds, caching, and flow optimization. Define and evolve methodology standards for front-end design and verification flows. Architect and enhance CI / pre-submit verification flows to improve quality and turnaround time. Integrate and support industry EDA tools within robust scripted flows. Collaborate with RTL, DV, methodology, and infrastructure teams. Debug complex infrastructure and build-system issues. Drive adoption through documentation and training., Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com. Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. 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