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# Senior Hardware Post-Silicon Validation Engineer (Hybrid)

- **Company:** Cisco Systems, Inc.
- **Location:** San Jose, CA, United States
- **Experience:** Expert
- **Salary:** $165,000.0 - $241,400.0
- **Contract:** Permanent contract
- **Skills:** Board Bringup, Data Analysis, Boolean Algebra, Code Coverage, Computer Engineering, Software Debugging, Ethernet, Python (Programming Language), Networking Basics, PCI Express, Signal Integrity, Universal Asynchronous Receiver/Transmitter, USB, Scripting, Serial Peripheral Interface, Hardware Testing, EMMC
- **Published:** July 30, 2026
- **Apply:** https://jobs.localjobnetwork.com/apply/add/87483003/1

## About the Role

* Bachelor's degree in Electrical Engineering, Computer Engineering, or related field and 6+ years of experience in post-silicon electrical validation, hardware bring-up and lab-based silicon debug, or Master's degree in Electrical Engineering, Computer Engineering, or related field and 3+ years of experience in post-silicon electrical validation, hardware bring-up and lab-based silicon debug, or PhD in Electrical Engineering, Computer Engineering, or related field and 1+ years of experience in post-silicon electrical validation, hardware bring-up and lab-based silicon debug.
 * Experience in electronics, digital logic, signal integrity, and power integrity
 * Experience in high-speed measurement techniques (eye diagrams, BER, jitter, compliance testing)
 * Experience with interfaces such as DDR5, USB 3.x, SGMII, PCIe, USB2.0, eMMC, SPI, MDIO, I2C, and UART
 * Experience with Reading and Reviewing schematics and layout files for complex boards

Preferred Qualifications

 * Experience working independently, lead, plan and execute lab-based debug efforts
 * Hands-on experience with silicon bring-up and post-silicon validation labs
 * Experience validating Ethernet, PCIe, and SerDes interfaces
 * Scripting skills for lab automation and data analysis (Python preferred)
 * Understanding of networking fundamentals and packet-based systems

## Description

* Lead hands-on post-silicon electrical validation in lab environments for networking ASICs and evaluation platforms
 * Own early-silicon bring-up activities from first power-on through feature enablement
 * Define, execute, and refine detailed hardware validation plans covering functionality characterization, performance, and reliability
 * Drive validation readiness, lab infrastructure setup, and test coverage strategy
 * Lead power-on sequencing, reset strategy validation, clock bring-up, and strap configuration
 * Perform in-depth voltage, current, power integrity (PDN), and signal integrity analysis
 * Capture, analyze, and interpret waveforms, eye diagrams, jitter, BER, PDN measurements, power supply stability and noise.
 * Independently isolate and root-cause silicon, package, board, or signal integrity issues
 * Lead validation of Ethernet MAC/PHY and high-speed interfaces such as PCIe and SerDes
 * Oversee packet-level validation using traffic generators and protocol analyzers
 * Validate system-level behavior under real-world networking workloads
 * Advanced-level operation of oscilloscopes, logic analyzers, VNAs, protocol analyzers, BERTs, and multimeters
 * Develop and maintain lab automation using scripts and frameworks (e.g., Python)
 * Plan and execute thermal testing using chambers and chillers across operating ranges


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