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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Hardware/ Software Co-Design Engineer - **Company:** Neuralink Corp. - **Location:** Fremont, CA, United States - **Salary:** $151,000.0 - $261,000.0 - **Contract:** Temporary contract - **Skills:** Artificial Intelligence, C++ (Programming Language), Data Compression, Computer Engineering, Microarchitecture, Digital Technology, Embedded Software, Firmware, Python (Programming Language), Network Interface, Serial Communications, SystemC, System on a Chip, SystemVerilog, Information Technology, Instruction Set Architecture, Hardware Acceleration, Physical Design - **Published:** May 22, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=18845a93a3791522 ## About the Role Do you have experience in Video compression?, * Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience * Evidence of exceptional ability in electrical engineering, computer science, or computer engineering * Experience designing and implementing embedded software in C or Rust * Expertise in SystemVerilog, C/C++, Python * Experience designing and implementing emulation models, transactors, and test environments to replicate hardware behavior * Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools * Experience in designing digital signal processing pipelines, from algorithm to RTL, * Experience in architecture optimization with process technology customization * Experience in the verification of complex digital systems, using industry standard tools * Experience in the physical design of complex digital systems, using industry standard tools * Experience testing and debugging digital system-on-a-chips * Functional modeling experience and logic verification with SystemVerilog, SystemC/C++ * Experience automating tool flows * Experience in processor instruction set architecture design * Experience in compiler back-end design and customization ## Description The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future., Our Hardware/ Software Co-Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred. * Micro-architecture design and RTL implementation of: * + Low-power digital signal processors + Low-power general-purpose hardware accelerators + Low-power graphics processing units + Low-power radio MAC/PHY + Low-power serial link MAC/PHY * Design and optimization of hardware/software interface with firmware engineers * Application-specific architecture optimization including: * + Complex system modeling for energy and performance benchmarks + Workload analysis and modeling + Energy/performance profiling and analysis + Leveraging architecture-level design trade-offs with process technology and workload type + Balancing cost and performance under manufacturing process variation * Collaboration on silicon bring-up tests with verification engineers ## Related Videos - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Playing Pong on a shoulder press machine](https://www.wearedevelopers.com/videos/100140-playing-pong-on-a-shoulder-press-machine) - [We Know Developers Are Neurodiverse. So Why Do Tech Teams Still Break?](https://www.wearedevelopers.com/videos/2023-we-know-developers-are-neurodiverse-so-why-do-tech-teams-still-break) - [Agent Smith Gets Hardware: Autonomous IoT Hacking From Debug Port to Cloud API](https://www.wearedevelopers.com/videos/100258-agent-smith-gets-hardware-autonomous-iot-hacking-from-debug-port-to-cloud-api) - [Strange New Worlds: shaping the future of the digital age](https://www.wearedevelopers.com/videos/677-strange-new-worlds-shaping-the-future-of-the-digital-age) - [When Agents Meet Legacy: Never Change a Running System](https://www.wearedevelopers.com/videos/100320-when-agents-meet-legacy-never-change-a-running-system) ## Related Articles - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline) - [Dev Digest 118 - not a total recall](https://www.wearedevelopers.com/magazine/452-dev-digest-118-not-a-total-recall) - [Dev Digest 120 - Apple and peers](https://www.wearedevelopers.com/magazine/455-dev-digest-120-apple-and-peers) - [Dev Digest 132 - Binging WADFlix?](https://www.wearedevelopers.com/magazine/473-dev-digest-132-binging-wadflix) - [How software is steering vehicle technology](https://www.wearedevelopers.com/magazine/515-how-software-is-steering-vehicle-technology) - [Are Brain-Computer Interfaces Good or Bad?](https://www.wearedevelopers.com/magazine/367-are-brain-computer-interfaces-good-or-bad)