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# Senior PLL Design Engineer

- **Company:** Ethernovia
- **Location:** Utrecht, Netherlands
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** C++ (Programming Language), Ethernet, Firmware, Python (Programming Language), Verilog, Front End Software Development
- **Published:** July 15, 2026
- **Apply:** https://www.adzuna.nl/details/5566631040

## About the Role

* A MSc or PhD degree in Electrical Engineering (EE)
 * At least 8 years of experience in PLL design in advanced CMOS nodes
 + Preferably also experience with RTL, Verilog, C++ & Python
 * Experience in the domain of Ethernet AFEs is a plus
 * Team player with experience working in Mixed-Signal IC design teams
 * Excellent communication skills
 * Fluent in English
 * Located in: Utrecht, The Netherlands or willing to locate to the Netherlands

## Description

* We have a full-time opening for a Senior PLL designer who will work on-site in a team using advanced CMOS processes
 + Driving the architecture and implementation of advanced PLLs (with challenging performance & efficiency specifications).
 * The work typically spans the planning & execution of a full design cycle from;
 + Specification, via study & design, test-chips and their evaluation, all the way to qualification and production.
 + All this not only in close collaboration with the Analog Front-End design and Layout teams, but also with the DSP, Digital, Firmware, and System teams, as well as Marketing & FAEs.
 * This obviously requires a strong team-player mentality of all involved, so expect professional colleagues with a focus on the end-goal, as well as the needs of team-members to reach it.
 * Furthermore, we are a growing and flexible start-up company which stimulates employees to broaden their experience & skills by learning new & exciting design challenges.


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