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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Staff Design Hardware Engineer / Digital Design Engineer - **Company:** ARTERIS IP - **Location:** Montigny-le-Bretonneux, France (Remote available) - **Experience:** Expert - **Salary:** €65,000.0 - €75,000.0 - **Contract:** Permanent contract - **Skills:** C++ (Programming Language), Communications Protocols, Python (Programming Language), PCI Express, SystemC, System on a Chip, SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), Scripting, Script Language, Information Technology - **Published:** July 31, 2026 - **Apply:** https://fr.indeed.com/viewjob?jk=53f005a46b5bf6f4 ## About the Role * Minimum 5 ans d'expérience en conception de SoC / IP / NoC (obligatoire) * Idéalement, expérience des protocoles de communication cohérents et non cohérents (AMBA, PCIe, CXL, OCP…) * Idéalement, bonne maîtrise des architectures CPU (ARM, RISC-V) * Solide expérience du flux de conception SoC/IP (spécification, architecture, RTL, vérification, DFT, synthèse, contraintes timing et consommation) (obligatoire) * Excellentes capacités d'analyse, de communication et de travail en équipe * Maîtrise de SystemC, Verilog/VHDL/SystemVerilog, outils Cadence/Synopsys/Mentor (obligatoire) * Idéalement, connaissances en C++, Python et langages de script Formation Master, Bac +5 ou Doctorat en électronique, informatique ou domaine connexe, Experience & Qualifications * At least 5 years of experience in SoC/IP/NoC design * Ideally, experience with coherent and non-coherent communication protocols (AMBA, PCIe, CXL, OCP, etc.) * Ideally, strong understanding of CPU architectures (ARM, RISC-V) * Strong experience in SoC/IP design flow (specification, architecture, RTL coding, verification, DFT, synthesis, timing and power closure) (Required) * Excellent problem-solving, communication, and teamwork skills * Knowledge of SystemC, Verilog/VHDL/SystemVerilog, Cadence/Synopsys/Mentor tools (Required) * Experience with C++, Python, and scripting languages (Required) Education Master's degree or PhD in Electronics, Computer Science, or related field ## Description En tant qu'Ingénieur Staff Hardware Design, vous serez responsable du développement de composants hardware complexes et de leur livraison dans les délais et avec le niveau de qualité attendu.Vous interviendrez à l'échelle système, sur des architectures de Network-on-Chip (NoC) hautement configurables. Vos responsabilités * Rédiger des spécifications d'architecture pour des réseaux sur puce hautement configurables * Contribuer à la conception des blocs hardware et garantir leur qualité * Participer à la définition des méthodologies de vérification et à l'environnement de régression * Collaborer étroitement avec les équipes hardware et software afin d'assurer la cohérence du produit * Maintenir et améliorer les versions existantes en collaboration avec l'équipe Application Engineering * Accompagner et supporter les membres de l'équipe sur leurs problématiques techniques, As a Staff Hardware Design Engineer, you will be responsible for developing complex hardware components and ensuring their delivery on time and with the required level of quality.You will work at system level on highly configurable Network-on-Chip (NoC) architectures. Key Responsibilities * Write architecture specifications for highly configurable on-chip networks * Contribute to hardware block design and ensure quality * Participate in verification methodology and regression environment * Collaborate closely with hardware and software teams to ensure product consistency * Maintain and improve existing versions in collaboration with Application Engineering teams * Support team members on technical challenges ## Related Videos - [JavaScript? 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