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# Package Design Engineer - Up to Staff level

- **Company:** Qualcomm
- **Location:** San Diego, CA, United States (Remote available)
- **Experience:** Expert
- **Salary:** $154,000.0 - $252,800.0
- **Contract:** Permanent contract
- **Skills:** PCI Express, Hfss
- **Published:** May 22, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=1252020ca8992282

## About the Role

Do you have experience in Electromagnetic theory?, Do you have a Master's degree?, As the IC Package Design Engineer, you demonstrate fundamental knowledge or proven experience in the following:

 * Proficient in Cadence APD & SiP.
 * Basic knowledge in high-speed IO interfaces and electromagnetic field.
 * Knowledge of IC packaging structures, chip-package, and package-board interaction.
 * Basic knowledge of electronic packaging process and typical failure modes preferred., * Master's degree in electrical engineering, mechanical engineering, material science, or related fields with 5+ years of experience.
 * Proven fundamentals in electrical, material, thermal, or mechanical engineering fields.
 * Familiarity with various sophisticated package configurations and assembly/substrate technology (Flip chip BGA, 2.5D/3D Interposer, etc.).
 * Experience in package design and proficiency in Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP).
 * Basic understanding of some SI/PI tools (XtractIM, PowerSI, HFSS, Q3D, etc.), package model extraction, S-parameters, and RLGC model.
 * Basic knowledge of substrate manufacturing process, structure, design rules, and material properties.
 * Proven understanding of high-speed interfaces, including DDR, PCIe, UCIE, etc.
 * Experience with Calibre tool and package design reviews.
 * Knowledge of high-speed layout constraints (crosstalk mitigation, differential pairs).
 * Solid understanding of Design Rules Check and Design for Manufacturing.



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