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# Senior Test Engineer

- **Company:** Insight Global
- **Location:** San Diego, CA, United States
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Altium Designer, Computer Engineering, Software Debugging, Release Management, Signal Integrity, Hardware Testing, Yield Optimization, Data Analytics
- **Published:** July 16, 2026
- **Apply:** https://www.juju.com/job/00000000gh6f0q

## About the Role

BS in Electrical/Computer Engineering (or related)

 - 6+ years semiconductor test engineering experience

 - Experience owning NPI programs (concept * production)

 - Advantest V93000 (93K) / SmarTest 7/8 or Teradyne UltraFLEX experience

 - Knowledge of DFT (BIST, scan, boundary scan)

 - RF experience - High-speed (signal integrity, jitter, BER, >40GHz)

 - SerDes / CDR / high-speed I/O (200Gbps+), Automotive (AEC-Q100) knowledge

 - PCB design (Cadence, Altium), wafer-level test, probe cards

 - Data analytics / ML for yield improvement

## Description

We are seeking a Senior NPI Test Engineer to join our team as a key technical contributor responsible for owning end-to-end test development for semiconductor products from design-for-test (DFT) planning through production release. This individual will lead NPI efforts across both high-speed signal integrity and capacitive sensing product lines, with an immediate focus on a SIP program using the Advantest V93000 (SmarTest 7/8) platform., Develop/debug ATE test programs on Advantest V93000 (93K)

 - Support test development on Teradyne uFlex for analog/sensing products

 - Design test hardware (load boards, probe interfaces)

 - Perform hands-on lab work: bring-up, silicon debug, and production release

 - Partner with design teams on DFT and testability requirements

 - Support characterization, correlation, and test readiness reviews

 - Transfer solutions to OSAT/manufacturing sites and drive yield improvements

 - Mentor junior engineers and build reusable test IP/documentation


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