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# Senior Firmware Engineer

- **Company:** Avispa Technology
- **Location:** Tucson, AZ, United States
- **Experience:** Expert
- **Salary:** $203,840.0
- **Contract:** Temporary contract
- **Skills:** Agile Methodology, Data Analysis, C++ (Programming Language), Code Review, Communications Protocols, Software Debugging, Memory Management, Middleware, Embedded Software, Firmware, FreeRTOS, Hardware Design, Hardware-In-The-Loop Simulation, Joint Test Action (IEEE Standards), Python (Programming Language), Systems Development Life Cycle, Real-Time Operating Systems, Systems Architecture, Systems Integration, Universal Asynchronous Receiver/Transmitter, Serial Peripheral Interface, State Machines, System-level Testing, Bare Metal
- **Published:** May 15, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=2f64dc93f6338689

## About the Role

Do you have experience in Firmware?, * 5+ years of professional experience in embedded firmware/software, systems development using C/C++.

 * Strong experience designing scalable firmware architectures, including memory management, interrupt handling, and state machines.
 * Hands-on experience with low-level communication protocols (I2C, SPI, UART, CAN, USB).
 * Proficiency with debugging tools and techniques for hardware-software integration issues.
 * Experience working in cross-functional teams and agile development environments.
 * Experience using Python for automation, testing, or data analysis is preferred.
 * Familiarity with RTOS environments (RTOS & Bare Metal), such as FreeRTOS or Zephyr, is preferred.
 * Experience working within SAFe or similar agile frameworks for hardware development is preferred.
 * Demonstrated ability to lead projects or mentor junior engineers is preferred.
 * Strong communication skills with the ability to explain complex technical concepts to diverse stakeholders are preferred.

## Description

* Design and implement embedded firmware features using C/C++, optimizing performance for constrained environments including CPU, memory, and power limitations.
 * Develop low-level drivers and middleware to interface with sensors, actuators, and communication peripherals such as I2C, SPI, UART, CAN, and USB.
 * Build and maintain automated testing frameworks (primarily in Python) for Hardware-in-the-Loop (HIL) validation and system-level testing.
 * Collaborate in agile planning, backlog refinement, and cross-functional discussions to break down complex hardware-software features and ensure alignment with system architecture and timelines.
 * Lead technical code reviews, troubleshoot hardware-software interactions using debugging tools (JTAG/SWD, oscilloscopes, logic analyzers), and support system integration and stakeholder demonstrations.


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