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# Firmware/FPGA Entwickler IFF/COMMS - HENSOLDT

- **Company:** HESYS Technical Systems GmbH & Co. KG
- **Location:** München, Germany
- **Contract:** Permanent contract
- **Skills:** Systems Engineering, Code Review, Computer Programming, Firmware, Field-Programmable Gate Array (FPGA), Python (Programming Language), System Testing, Test Case, VHSIC Hardware Description Language (VHDL), Vivado, Test Scripts, Git, Information Technology, Software Version Control
- **Published:** July 6, 2026
- **Apply:** https://www.xing.com/jobs/muenchen-firmware-fpga-entwickler-iff-comms-hensoldt-156004396

## About the Role

* Abgeschlossenes Studium in Elektrotechnik, Informatik oder eine vergleichbare Qualifikation
 * Mehrjährige Erfahrung in der FPGA-Entwicklung mit VHDL
 * Erfahrung mit XILINX Vivado Design Suite, XILINX ISE Design Suite und QuestaSim
 * Kenntnisse in UltraScale+ MPSoC, DOORS oder Enterprise Architect wünschenswert
 * Erste Erfahrung mit OSVVM Framework sowie Python-Programmierung von Vorteil
 * Deutsch und Englisch mindestens verhandlungssicher

## Description

In dieser Rolle entwickeln Sie Firmware und FPGA-Lösungen für IFF-Geräte im Sekundärradarbereich. Sie arbeiten an VHDL-Code, Testbenches, Verifikation, Traceability und Integration in enger Abstimmung mit System Engineering, Hardware und Software., * Erstellung von Firmware-Anforderungen und Firmware-Architekturen

 * Umsetzung von FPGA-Firmware in VHDL gemäß Coding Standards
 * Erstellung von VHDL-Testbenches zur Verifikation und Simulation
 * Definition und Umsetzung von Low-Level-Testfällen sowie HW-Testskripten
 * Durchführung von Code Reviews und Sicherstellung der Traceability zwischen Anforderungen und Code
 * Unterstützung von Integration, Systemtests und Versionskontrolle mit Git, * Implement FPGA firmware in VHDL according to coding standards
 * Create VHDL testbenches for verification and simulation
 * Define and implement low-level test cases and hardware test scripts
 * Perform code reviews and ensure traceability between requirements and code
 * Support integration, system tests and version control with Git

Your profile

 * Completed degree in electrical engineering, computer science or a comparable qualification
 * Several years of experience in FPGA development with VHDL
 * Experience with XILINX Vivado Design Suite, XILINX ISE Design Suite and QuestaSim
 * Knowledge of UltraScale+ MPSoC, DOORS or Enterprise Architect is desirable
 * Initial experience with OSVVM framework and Python programming is an advantage
 * Business-fluent German and English skills


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