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# Silicon Engineer, EDA Infrastructure

- **Company:** The Meta Game, Inc.
- **Location:** Menlo Park, CA, United States
- **Salary:** $114,000.0 - $141,000.0
- **Contract:** Permanent contract
- **Skills:** Computer-Aided Design, Artificial Intelligence, Computing Platforms, Computer Engineering, Continuous Integration, Data Centers, Software Debugging, Linux, File Systems, Electronic Design Automation, Hardware Design, Job Scheduling, Python (Programming Language), Shell Script, Software Engineering, Static Timing Analysis, Tcl (Programming Language), Scripting, Application Specific Integrated Circuits, Information Technology, Physical Verification, Physical Design, Software Version Control
- **Published:** July 22, 2026
- **Apply:** https://www.techcareers.com/job.asp?id=3329312367&tx=KR10201LFU&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54

## About the Role

1. Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
 2. Experience with EDA tools and design flows spanning RTL synthesis, place-and-route, static timing analysis, or physical verification
 3. Experience with scripting languages such as Python, Tcl, or shell scripting for flow automation and infrastructure tooling
 4. Experience working in Linux-based compute environments, including familiarity with job scheduling systems and file system management
 5. Experience collaborating with hardware or chip design teams to support or improve engineering workflows, 1. Exposure to ASIC or custom silicon design methodologies, including understanding of the RTL-to-GDSII flow
 2. Experience with distributed compute environments and workload management systems commonly used in large-scale EDA deployments
 3. Experience developing CI/CD pipelines or automated regression frameworks in a hardware design context
 4. Familiarity with industry-standard EDA tools such as those used for synthesis, physical design, or signoff verification

## Description

Meta's Silicon Engineering team is building custom silicon solutions that power the infrastructure behind Meta's AI, data center, and next-generation computing platforms. As a Silicon Engineer focused on EDA Infrastructure, you will develop and maintain the tooling, flows, and automation frameworks that enable Meta's chip design teams to efficiently bring silicon from concept to tape-out. In this role, you will work at the intersection of software engineering and hardware design, building scalable EDA environments, optimizing design flows, and ensuring the reliability of the infrastructure that underpins Meta's custom silicon development., 1. Develop and maintain EDA tool infrastructure, including installation, configuration, and version management of industry-standard EDA tools across the design environment

 2. Build and improve automation scripts and flow frameworks that support RTL-to-GDSII design flows, including synthesis, place-and-route, and physical verification
 3. Collaborate with chip design engineers to identify bottlenecks in EDA flows and implement targeted improvements to runtime, capacity, and reliability
 4. Support compute and storage infrastructure used by EDA workloads, including job scheduling, license management, and distributed compute environments
 5. Develop tooling to monitor EDA job health, track flow metrics, and surface actionable data to design teams
 6. Assist in the evaluation and integration of new EDA tools and methodologies into existing design infrastructure
 7. Write and maintain documentation for EDA flow components, infrastructure configurations, and internal tooling
 8. Participate in debugging and root-cause analysis of EDA flow failures, working closely with design and CAD engineering teams to resolve issues
 9. Contribute to continuous integration pipelines for silicon design flows, enabling automated regression and sign-off checks


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