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# System Power Integration Engineer

- **Company:** OSI Engineering
- **Location:** Cupertino, CA, United States
- **Experience:** Experienced
- **Salary:** $139,360.0 - $170,560.0
- **Contract:** Temporary contract
- **Skills:** Python (Programming Language), MATLAB, Systems Integration, Hfss, Programming Languages
- **Published:** July 21, 2026
- **Apply:** https://www.dice.com/job-detail/38a40232-a0a6-46a7-afdc-31b3750be947

## About the Role

* M.S Degree with 4~7 years relevant work experience
 * Proven technical understanding of power supply architectures covering voltage regulator technologies, power distribution network (PDN) modeling, PCB design practices and trade-offs for PDN design and optimization.
 * Skills with associated tools for 2.5D (PowerSI, SIWave, Sentinel-PI, nSys), 3D Full wave (HFSS, nWave), quasi-static tools (Q3D, nApex) is required.
 * Relevant proven understanding of HSPICE, Spectre, AMS, and Simplis models for system-level transient droop analysis is also vital.
 * Understanding of die-package-board power delivery network co-design constraints and tradeoffs.
 * Ability to work with multiple cross-functional teams to make the right trade-offs on the system performance is a must., * Ph. D with minimum 3-4 year's experience.
 * Good understanding of multi-phase of Buck/Boost converter and LDO design principles, operating modes, and system integration care-about.
 * Deep Experience in CPM (Chip-Power-Model) usage for system transient analysis is an added benefit.
 * Hands-on experiences on package or board layout with Cadence is a plus.
 * Experience with Python, MATLAB or other programming languages is desired.
 * Excellent documentation and communication skills, ability to work independently, a desire to mentor, and demonstrated ability to innovate are required.

## Description

* Guide and work closely with the system team on the component selections, for optimum power solutions with high and low load transient, at different performance state.
 * Work closely with System Design teams to provide detailed layout strategy and guidelines during design execution phase.
 * Work with HW Validation teams to develop test-suites to perform system-level validation for evaluation of design margins on the power domains. The roll includes the PI support throughout the product design process which can include system pathfinding and verification stages, and characterization reviews with continuing guidance through production and ramp.


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