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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Quantum Spin Qubit Integration - **Company:** Globalfoundries U.S. Inc. - **Location:** Malta, NY, United States - **Experience:** Expert - **Salary:** $98,000.0 - $176,000.0 - **Contract:** Permanent contract - **Skills:** Data Analysis, Software Debugging, Multiplexing, Hardware Design, Statistical Process Control (SPC), Quantum Dots, Enterprise Integration - **Published:** July 22, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=5218f9c7a2da5347 ## About the Role * Education: BS in Electrical Engineering, Materials Science, Chemical Engineering, Physics, Applied Physics, or related field. * Years of Experience: 5+ years in semiconductor process, device, materials, quantum device, or integration engineering. * Significant experience with semiconductor device integration, advanced gate stacks, nanoscale device structures, or cryogenic device/quantum-hardware integration. * Experience with silicon spin-qubit, quantum-dot, MOS, Si/SiGe, FD-SOI, or related semiconductor device platforms. * Experience with electrical, transport, RF/microwave, or cryogenic characterization of semiconductor devices, quantum dots, charge sensors, or related structures. * Experience integrating or characterizing structures for qubit control/read-out, including charge sensing, RF reflectometry, gate-based sensing, or spin/charge transport measurements. * Strong data analysis, problem-solving, debugging, communication, and cross-functional collaboration skills. * Travel: ~10%., * MS or PhD in Electrical Engineering, Physics, Applied Physics, Materials Science, or related field. * Experience with isotopically enriched silicon, Si/SiGe heterostructures, quantum wells, MOS quantum dots, FD-SOI devices, or CMOS-compatible spin-qubit process flows. * Experience with nanoscale patterning and process modules such as e-beam or advanced optical lithography, thin-film deposition, ALD, oxidation, wet/dry etch, CMP, implants, and anneals. * Familiarity with spin-qubit device physics, including spin resonance, spin shuttling, exchange coupling, valley splitting, charge noise, and spin-dependent read-out. * Experience with cryogenic probing, dilution refrigerator measurements, RF reflectometry, S-parameters, low-noise transport, charge sensing, or automated qubit/device tuning. * Experience with BEOL integration, low-parasitic interconnect, fine-pitch routing, TSVs, flip-chip, interposers, thermalization structures, or cryogenic packaging. * Familiarity with cryo-CMOS control/read-out interfaces, multiplexing, compact device layouts, quantum device TCAD/modeling, or design-rule development for qubit arrays. * Experience with DOE, yield learning, variability modeling, root-cause analysis, SPC, or reliability assessment in R&D or manufacturing environments. ## Description * Support integration of spin-qubit hardware, including isotopically enriched silicon channels, quantum-dot gate stacks, charge sensors, gate fanout, BEOL modules, cryogenic interfaces, and advanced packaging. * Develop and execute CMOS-compatible process integration flows for quantum-dot devices, including channel formation, gate dielectric/metal stacks, fine-pitch gate definition, isolation, contacts, and module interactions. * Improve low-noise device and interconnect structures for cryogenic operation, including charge-sensing structures, RF reflectometry interfaces, bias routing, filtering structures, and packaging interfaces. * Analyze process and device performance drivers such as charge noise, disorder, interface traps, variability, contamination, leakage, mobility degradation, valley splitting, and thermalization. * Execute DOEs and analyze inline, physical, electrical, RF/microwave, transport, and cryogenic data to guide integration improvements. * Work cross-functionally with device, process, metrology, packaging, reliability, design enablement, and cryogenic-test teams to deliver integration milestones. * Translate spin-qubit requirements into manufacturable flows, design rules, materials specifications, characterization plans, and yield-learning actions. * Document process flows, assumptions, materials tradeoffs, characterization results, and technical learnings for scalable development and knowledge transfer. ## Related Videos - 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