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# Senior HSIO Digital Design Engineer

- **Company:** Samsung
- **Location:** San Jose, CA, United States
- **Experience:** Expert
- **Salary:** $138,000.0 - $206,000.0
- **Contract:** Temporary contract
- **Skills:** Artificial Intelligence, Logic Synthesis of Circuits, PCI Express, Signal Integrity
- **Published:** August 2, 2026
- **Apply:** https://diversityjobs.com/main/sendform/8/8/28176/1/17792426?backUrl=%2Fcareer%2F17792426%2FSenior-Hsio-Digital-Design-Engineer-California-San-Jose

## About the Role

This team is focused on next-generation HSIO (High-Speed I/O) design for Samsung's AI production platforms. Ideal candidates will have 3+ years of industry experience specializing in digital design for die-to-die(chiplet) interfaces or similar high-speed I/O technologies.

Candidates are expected to have a strong understanding of the end-to-end digital design flow and the ability to collaborate effectively with system and analog teams., * BS in Electrical Engineering with 5+ Years of experience, MS in Electrical Engineering with 3+ years of experience or PhD in Electrical Engineering

 * Hands-on experience in High-Speed I/O PHY IP development, with expertise in one or more of the following areas:
 * Strong understanding of high-speed serial interconnect protocols and associated design trade-offs
 * Solid understanding of how analog and mixed-signal design and verification impact digital-on-top development flows
 * Knowledge of Signal Integrity (SI) and Power Integrity (PI) modeling for High-Speed I/O designs

What You Bring

 * Understanding of SoC protocols including AXI/CHI/CXS.B/CXL/PCIE/UA-Link
 * Familiarity with HSIO PHY layers protocols and architectures

## Description

At Samsung Semiconductor, we use Artificial Intelligence (AI) tools in the recruitment process to enhance efficiency. However, AI is used as a support tool, not a final decision-maker. All hiring decisions are made by our human recruiting team and hiring managers to ensure every candidate is evaluated fairly and holistically.


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