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# Staff Design Verification Organization

- **Company:** Lightmatter, Inc.
- **Location:** United States
- **Experience:** Expert
- **Salary:** $224,000.0 - $257,000.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Analog Electronics, Computer Engineering, Software Debugging, Logic Synthesis of Circuits, Emulators, Formal Verification, Python (Programming Language), SystemVerilog, Test Case, Scripting, Computer Network Operations, ModelSim
- **Published:** July 31, 2026
- **Apply:** https://www.careerbuilder.com/job-details/sr-staff-design-verification-mountain-view-ca--66fca5aa-3a25-41dc-8ae5-4ae8a05dbac1

## About the Role

* Bachelor's degree in Electrical Engineering, Computer Engineering, a related field, or equivalent experience
 * Minimum of 8 years of design verification and SystemVerilog experience
 * 2+ years of experience in Python
 * Expertise in developing with the UVM library
 * Experience with simulators such as Xcelium, ModelSim, Questa, or VCS
 * Strong problem solver and collaborator, * Master's degree or higher in Electrical Engineering, Computer Engineering, a related field, or equivalent experience with 6 years of relevant experience
 * Experience with post-silicon validation and debug
 * Experience with AMS verification, Analog Circuit Design, Artificial Intelligence (AI), Computer Engineering, Debugging Skills, Design Verification, Electrical Engineering, Formal Verification, Graphic Design, Health Plan, Intrusion Prevention Systems, Metrics, Model Verification, ModelSim, Network Operations Center, Performance Modeling, Photonics, Problem Solving Skills, Python Programming/Scripting Language, Simulation, SystemVerilog, Technical/Engineering Design, Test Bench, Test Case, Test Plan/Schedule, Testing, Validation Testing, Verification Engineering

## Description

* Define and enhance the DV methodologies required for integrated digital, analog, and photonic devices with a strong emphasis on emulation for design verification.
 * Create and execute test plans to ensure high-quality tapeouts that meet functional and performance goals, while leveraging emulation where appropriate.
 * Collaborate with architects, DV engineers, digital designers, and analog/photonics designers to define validation flows.
 * Create reusable and scalable test bench components that enable efficient and effective verification.
 * Close coverage and finish all DV signoff requirements, with a focus on leveraging mixed signal simulations to achieve high coverage metrics
 * Work on block level and full chip design verification.
 * Integrate analog design IPs from vendors and internal teams and develop verification environments for simulation and emulation.
 * Work with analog design engineers to create behavioral models for analog designs and with digital design engineers to integrate models/testcase/checkers into upper levels


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