> Markdown version of [/jobs/ext/1901288-systems-prototyping-engineer](https://www.wearedevelopers.com/jobs/ext/1901288-systems-prototyping-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Systems Prototyping Engineer - **Company:** NVIDIA Ltd. - **Location:** Santa Clara, CA, United States - **Experience:** Expert - **Salary:** $168,000.0 - $264,500.0 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Systems Engineering, Computer Programming, Computer Engineering, Software Debugging, Logic Synthesis of Circuits, Perl (Programming Language), Emulators, Network Interface Controllers, Field-Programmable Gate Array (FPGA), GNU Debuggers, Unix Shell, Machine Learning, PCI Express, SystemVerilog, Tcl (Programming Language), USB, Verilog, Vivado, Scripting, Graphics Processing Unit (GPU), Application Specific Integrated Circuits, Software Verification, Backend, Physical Design - **Published:** July 31, 2026 - **Apply:** https://www.careerbuilder.com/job-details/senior-systems-prototyping-engineer-santa-clara-ca--c07e74a0-1bc9-4211-a02c-3af0394bf194 ## About the Role * BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or related fields with 7+ years of experience, or MS with 5+ years of proven experience in FPGA prototyping. * Good understanding of FPGA prototyping architecture, devices, flows and tools. * Experience in backend flows of FPGA Prototyping - Synthesis, P&R and Timing closure, with emphasis on Synopsys Protocompiler or Synplify Premier and Xilinx Vivado * Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB). * Knowledge of Verilog, System Verilog and digital design concepts. * Understand the industry standard protocols like PCIe, CXL, NVLINK, USB, CHI and CPU-GPU Coherency * Good debugging and problem-solving skills. * Hands on experience with lab FPGA debug methodologies, tools (Identify or ChipScope), and lab debug equipment (oscilloscopes, logic analyzers). Ways to stand out from the crowd: * Scripting knowledge (Perl/shell/Tcl) is desired. * Good documentation, communication and interpersonal skills. * Experience with memory bring up of Memory (LPDDR5/6, DDR5/6), CXL/PCIE and/or high speed I/F such as USB4/3 is desirable * Prior experience with hardware emulation or prototyping (Synopsys HAPS, Zebu, Mentor Veloce) of a high-performance processor or SOC is a plus., ASIC (Application Specific Integrated Circuit), ASIC Design, ASIC Verification, Artificial Intelligence (AI), CPU (Central Processing Unit), Communication Skills, Computer Engineering, Debugging Skills, Debugging Tools, Design Verification, Digital Circuit Design, Documentation, Electrical Engineering, Emulators, FPGA, FPGA Design, GDB (Gnu Debugger), GPU (Graphics Processing Unit), Human Intelligence (HUMINT), Industry Standards, Interpersonal Skills, Laboratory, Laboratory Equipment, Laboratory Techniques, Logic Analyzer, Machine Learning, Memory Hardware, Mentoring, Oscilloscope, PCI Express (PCI-E), Performance Management, Perl Programming Language, Place and Route, Power Amplifier, Problem Solving Skills, Prototyping, Scripting (Scripting Languages), SystemVerilog, Systems Engineering, Tcl-Tk, Testing, Timing Verification, Topology, USB, Unix Shell Programming, Verilog Hardware Description Language ## Description Are you passionate about DGX system connecting multiple ASIC chips together and FPGA prototyping? Are you interested in pushing the boundaries of innovation to make FPGA prototypes faster and more efficient? Can you work in a fast-paced environment that requires coordination between many teams across geographies and resolving sophisticated problems daily? If so, we are looking for hardworking systems engineers who will craft FPGA prototypes of our next generation GPUs, SOCs, NICs, Switches on standard FPGA prototyping platforms. We are now looking for a Senior Systems Prototyping Engineer to join our Emulation team onsite in Santa Clara, CA. What you'll be doing: * Build FPGA prototypes by making RTL FPGA-friendly, partitioning the design and taking it through synthesis and place and route. * Improve performance of the prototype, analyze timing and generate bit streams. * Bring up the design on FPGA prototyping platforms and indulge in problem solving. * Release the prototype to the customers and support them when they face problems. * You are expected to understand the design and implementation, define the configurations, develop/modify the bringup and testing infrastructure and verify the correctness of the design. * Understand the system topologies with multiple ASICs to realize the DGX systems on prototyping platforms and emulators * Good coordination with architects, designers, verification engineers, and SW teams will be needed to accomplish your tasks. ## Related Videos - [Prototyping with Hardware and the Web](https://www.wearedevelopers.com/videos/651-prototyping-with-hardware-and-the-web) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Developing the Backend with Stefan Lingler, CTO at Shpock](https://www.wearedevelopers.com/videos/100360-developing-the-backend-with-stefan-lingler-cto-at-shpock) - [The Billion Dollar Machine: First Time Right.](https://www.wearedevelopers.com/videos/393-the-billion-dollar-machine-first-time-right) - [Project Fugu: Extending the web](https://www.wearedevelopers.com/videos/832-project-fugu-extending-the-web) - [Nest.js - TypeScript in the backend can also be clean](https://www.wearedevelopers.com/videos/1033-nest-js-typescript-in-the-backend-can-also-be-clean) ## Related Articles - [Résumé-Driven Development: How IT trends affect the job market for software developers](https://www.wearedevelopers.com/magazine/59-resume-driven-development-how-it-trends-affect-the-job-market-for-software-developers) - [Top 6 Hackathons for Developers in 2023](https://www.wearedevelopers.com/magazine/263-top-6-hackathons-for-developers-in-2023) - [Dev Digest 120 - Apple and peers](https://www.wearedevelopers.com/magazine/455-dev-digest-120-apple-and-peers) - [Data Science & more: The Lopez dilemma](https://www.wearedevelopers.com/magazine/10-data-science-more-the-lopez-dilemma) - [Should senior developers refuse interview coding challenges?](https://www.wearedevelopers.com/magazine/29-should-senior-developers-refuse-interview-coding-challenges) - [Dev Digest 129 - Now that's what I call private data!](https://www.wearedevelopers.com/magazine/468-dev-digest-129-now-that-s-what-i-call-private-data)