> Markdown version of [/jobs/ext/190232-senior-principal-signal-integrity-engineer-silicon-photonics-ai-interconnects](https://www.wearedevelopers.com/jobs/ext/190232-senior-principal-signal-integrity-engineer-silicon-photonics-ai-interconnects). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior/Principal Signal Integrity Engineer-Silicon Photonics & AI Interconnects - **Company:** Lumilens Inc. - **Location:** San Jose, CA, United States - **Experience:** Expert - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Analog Electronics, Data Analysis, Encodings, Python (Programming Language), Laboratory Information Management Systems, MATLAB, Signal Integrity, Tcl (Programming Language), Visual Systems, Hfss, Ansys - **Published:** May 19, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=2edf536324f7f272 ## About the Role * Bachelor's or Master's degree in Electrical Engineering, Physics, or related field (PhD preferred). * 10+ years of relevant experience in high-speed SI/PI, with strong emphasis on board-level, package-level, and silicon-level design/validation. * Deep expertise in very high-speed SerDes ( 56G, preferably 100G/200G PAM4), including channel modeling, equalization (FFE/DFE/CTLE), jitter/crosstalk analysis, eye diagrams, BER, and compliance/margining. * Extensive hands-on experience with leading SI/PI/EM tools (e.g., Ansys HFSS 3D/Layout, SIwave, Clarity, CST, Keysight ADS Momentum/Sigrity, HSPICE, HyperLynx). * Proven proficiency in time-domain transient simulations (HSPICE, ADS, MATLAB/Simulink) and scripting/automation (Python, TCL, MATLAB) for simulation flows, data analysis, and reporting. * Hands-on experience with 2.5D/3D packaging technologies (silicon/organic interposers, chiplet integration, HBM stacking) and high-frequency transmission line routing in silicon/photonic contexts. * Strong lab skills with high-bandwidth instruments (scopes, VNAs, BERTs, TDRs), measurement-simulation correlation, fixture/probing design, de-embedding, and vendor lab management. * Track record of bringing complex high-speed hardware/optical modules from concept to production, including multiple design spins and volume manufacturing support. * Demonstrated leadership in cross-functional design reviews, architectural influence, and clear communication of SI/PI concepts to diverse audiences., * Experience with power integrity co-simulation and SSO in advanced photonic-electronic packages. * Knowledge of emerging substrates (glass core, panel-level packaging) and optical interconnects (from pluggables to full CPO/NPO). * Background in EMI/EMC, mechanical, and thermal considerations for co-packaged optics and their SI/PI trade-offs. * Familiarity with advanced nodes, and chiplet standards (UCIe, etc.), in hybrid electrical-optical systems. ## Description Lumilens is revolutionizing AI compute infrastructure with next-generation photonic interconnects. Our solutions-leveraging co-packaged optics (CPO), near-packaged optics (NPO), high-density silicon photonics, and advanced heterogeneous integration-enable massive scale-out and scale-up architectures for the world's leading AI providers., * Perform detailed electromagnetic (EM) modeling, extraction, and simulation of advanced packages, including silicon interposers, bridges, 2.5D/3D stacks, fan-out, CoWoS-like, and EMIB-like structures. * Conduct comprehensive end-to-end high-speed channel analysis for analog circuits, SerDes (PAM4/NRZ at 100G+/lane), parallel buses, UCIe die-to-die links, and hybrid electrical-optical interconnects. * Develop and optimize package stack-ups, routing strategies, via transitions, bump pitch/layout, and redistribution layers (RDL) to minimize insertion/return loss, crosstalk, mode conversion, and impedance discontinuities. * Collaborate closely with silicon, photonic IC, and system design teams on bump map/pinout optimization, die-to-package co-design, floorplanning, and meeting SI targets across CMOS, BiCMOS and photonic processes. * Execute pre- and post-layout SI simulations with industry-standard tools to predict performance, identify risks, and recommend mitigations (e.g., equalization techniques, redundancy, material choices). * Establish SI design rules, guidelines, and best practices for advanced packaging in photonic-integrated systems, ensuring adoption across projects. * Partner with lab teams to correlate simulations with high-frequency measurements (VNA, TDR/TDT, oscilloscopes, BERTs) on test vehicles, including de-embedding of fixtures and launch structures. * Work with power integrity (PI) engineers on concurrent SI/PI analysis, including SSO, PDN resonance effects on high-speed signals, and decap optimization in dense photonic-electronic packages. * Lead technical reviews, present SI/PI findings to cross-functional stakeholders (technical and non-technical), and drive timely closure of design issues. * Contribute to methodology advancements for emerging technologies, including optical interconnects, glass-core substrates, wafer-/panel-level packaging, and CPO/NPO architectures. ## Related Videos - [Strange New Worlds: shaping the future of the digital age](https://www.wearedevelopers.com/videos/677-strange-new-worlds-shaping-the-future-of-the-digital-age) - [Leveraging Large Language Models for Legacy Code Translation: Challenges and Solutions](https://www.wearedevelopers.com/videos/1157-leveraging-large-language-models-for-legacy-code-translation-challenges-and-solutions) - [Cloud Vendor Lock-In - Is it just a new version of the Database Abstraction Layers?](https://www.wearedevelopers.com/videos/1185-cloud-vendor-lock-in-is-it-just-a-new-version-of-the-database-abstraction-layers) - [Photonic Computing: Programming a New Class of AI Accelerators (incl. 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