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# Senior FPGA Engineer (VHDL/Verilog)

- **Company:** Agad Technology
- **Location:** Schelle, Belgium
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Macintosh Computers, Automation of Tests, Computer Programming, Computer Networks, Software Debugging, Linux, Ethernet, Field-Programmable Gate Array (FPGA), Python (Programming Language), PCI Express, Static Timing Analysis, Tcl (Programming Language), TCP/IP, Verilog, VHSIC Hardware Description Language (VHDL), ModelSim, Jenkins
- **Published:** August 4, 2026
- **Apply:** https://www.adzuna.be/details/5826636252

## About the Role

Must-have

 * Master's degree in electronics engineering, or similar by experience.
 * Strong knowledge of VHDL and Verilog development. Programming skills in Tcl and Python.
 * Experience in timing analysis and closure.
 * Experience with unit simulation testing and test automation (Jenkins).
 * Familiar with working in a Linux environment. Understanding of networking concepts (Ethernet, TCP/IP, MAC addressing, buffering, etc.).
 * Strong problem-solving and debugging skills. Eagerness to familiarize yourself with new and cutting-edge technologies.

Nice-to-have

 * Familiar with Xilinx FPGA tools and QuestaSim/ModelSim.
 * Experience working with Cocotb verification environment.
 * Knowledge of high-speed interfaces: DDR4, Ethernet, PCIe, AXI4, AXI-lite.



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