> Markdown version of [/jobs/ext/1928816-senior-fpga-engineer-cyber](https://www.wearedevelopers.com/jobs/ext/1928816-senior-fpga-engineer-cyber). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior FPGA Engineer, Cyber - **Company:** Anduril Industries - **Location:** Washington, DC, United States - **Experience:** Expert - **Salary:** $166,000.0 - $220,000.0 - **Contract:** Permanent contract - **Skills:** Systems Engineering, Software Debugging, Linux, Logic Synthesis of Circuits, Embedded Software, Ethernet, Field-Programmable Gate Array (FPGA), Signal Processing, SystemVerilog, Systems Integration, Software Technical Review, Verilog, VHSIC Hardware Description Language (VHDL), Fpga Hardware, Gitlab-ci - **Published:** August 5, 2026 - **Apply:** https://www.clearancejobs.com/jobs/9077170/senior-fpga-engineer-cyber ## About the Role * Strong experience with FPGA development on Xilinx or comparable platforms, including SoC/MPSoC-based or other high-performance digital devices relevant to SDR systems. * Proficiency in VHDL, Verilog, or SystemVerilog, including simulation, timing closure, and resource/performance tradeoffs. * Experience building high-speed digital interfaces and datapaths such as Ethernet-based packet movement, DMA-adjacent flows, or streaming signal pipelines. * Hands-on familiarity with precision timing, synchronization, sysref/clocking concepts, and deterministic interface behavior. * Experience with FPGA verification methodologies and automation, including regression-oriented testbenches and CI-backed validation. * Ability to collaborate effectively with software and DSP engineers on register interfaces, control surfaces, and integration boundaries. * Comfort debugging in the lab using oscilloscopes, logic analyzers, spectrum analyzers, or related instrumentation. * Strong written and verbal communication skills for technical design reviews and cross-functional engineering work, * Experience with cocotb, GitLab CI/CD, or similar automation for FPGA verification and release confidence. * Background in FFT/channelization pipelines, PSD generation, AGC-adjacent blocks, or other signal-processing-oriented FPGA implementations. * Familiarity with embedded software interfaces to FPGA systems, including Linux-based control planes and hardware/software co-debug. * Experience presenting architecture and implementation details in customer-facing or formal design-review settings. * Track record of mentoring other engineers and improving design quality across a broader FPGA/DSP team. ## Description Anduril Cyber is hiring an FPGA Engineer with deep experience in high-throughput FPGA/SoC digital design, precision timing, and hardware/software integration. The role is defined around the technical depth and execution patterns reflected in the hiring plan and representative resume set without assuming a fixed silicon choice this early. * Design and implement high-throughput FPGA datapaths, packetization pipelines, timing-sensitive interfaces, and hardware-near acceleration blocks. * Own RTL design, simulation, verification, and lab bring-up across VHDL, Verilog, or SystemVerilog-based workflows. * Work closely with DSP, software, hardware, and systems engineers to turn algorithm and interface requirements into robust FPGA implementations. * Drive precision timing, synchronization, and throughput closure for the selected FPGA/SoC platform and adjacent high-speed digital interfaces. * Document architectures, interfaces, and verification approaches clearly enough for cross-functional integration and long-term maintainability. * Support design reviews, technical trade studies, and lab debugging with a hands-on, player-coach engineering mindset., To ensure your safety and help you navigate your job search with confidence, please keep the following critical points in mind: * No Financial Requests: Anduril will never solicit payment or demand personal financial details (such as banking information, credit card numbers, or social security numbers) at any stage of our hiring process. Our legitimate recruitment is entirely free for candidates. ## Related Videos - [Docker network without Docker](https://www.wearedevelopers.com/videos/1418-docker-network-without-docker) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [The Gashlycrumb Tinies of AI Networking You Must Know (or Languish!)](https://www.wearedevelopers.com/videos/2067-the-gashlycrumb-tinies-of-ai-networking-you-must-know-or-languish) - [Strange New Worlds: shaping the future of the digital age](https://www.wearedevelopers.com/videos/677-strange-new-worlds-shaping-the-future-of-the-digital-age) - [Docker exec without Docker](https://www.wearedevelopers.com/videos/1094-docker-exec-without-docker) - [How to Domain Model – An example from manufacturing](https://www.wearedevelopers.com/videos/742-how-to-domain-model-an-example-from-manufacturing) ## Related Articles - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline) - [Dev Digest 134 - Where pixels sing?](https://www.wearedevelopers.com/magazine/477-dev-digest-134-where-pixels-sing) - [Dev Digest 120 - Apple and peers](https://www.wearedevelopers.com/magazine/455-dev-digest-120-apple-and-peers) - [9 Ways to Make Money Hacking](https://www.wearedevelopers.com/magazine/333-9-ways-to-make-money-hacking) - [How Much FAANG Companies Actually Pay Software Engineers in 2025](https://www.wearedevelopers.com/magazine/230-how-much-faang-companies-actually-pay-software-engineers-in-2025) - [Dev Digest 188: CfP time, the risks of NPM and IKEA algorithms](https://www.wearedevelopers.com/magazine/635-dev-digest-188-cfp-time-the-risks-of-npm-and-ikea-algorithms)