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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior Digital Design Engineer - **Company:** Beagle - **Location:** Madrid, Spain - **Contract:** Permanent contract - **Skills:** Desktop Computing, Logic Synthesis of Circuits, Subsystems, Systems Integration, Verilog, VHSIC Hardware Description Language (VHDL), Git, Software Version Control - **Published:** August 5, 2026 - **Apply:** https://www.buscojobs.com.es/senior-digital-design-engineer-en-madrid-ID-365589792 ## About the Role Responsibilities: Define, design, and implement memory controllers and subsystems (DDR, HBM) Develop and verify RTL (Verilog or VHDL) for memory blocks Work with timing constraints and perform block-level testing Integrate memory IPs into So C environments Collaborate with cross?functional teams to ensure coherency and high?performance operation Required: 8+ years of industrial experience in digital design Strong knowledge of DDR or HBM memories Proven experience designing or integrating memory controllers Hands?on experience with AXI protocol Proficiency in RTL design (Verilog or VHDL) Experience with timing constraints and basic block?level testing Master's degree or Ph D Experience with version control (git, svn) Knowledge of coherency concepts and protocols Seniority level Mid?Senior level Employment type Full?time Job function Engineering and Design Semiconductor Manufacturing, Appliances, Electrical, and Electronics Manufacturing, and Computers and Electronics Manufacturing ## Description Connecting Ambitious Tech Companies with Exceptional Talent | Partner at Beagle | Semiconductor & Embedded Focus LOCATION: Barcelona, Spain SALARY: Negotiable DURATION: Permanent We are looking for a Senior Digital Design Engineer to design and develop high-performance memory subsystems for modern So Cs.You will work within the Memory Design Team and collaborate closely with other engineers to create efficient and robust memory architectures.Responsibilities: Define, design, and implement memory controllers and subsystems (DDR, HBM) Develop and verify RTL (Verilog or VHDL) for memory blocks Work with timing constraints and perform block-level testing Integrate memory IPs into So C environments Collaborate with cross?functional teams to ensure coherency and high?performance operation Required: 8+ years of industrial experience in digital design Strong knowledge of DDR or HBM memories Proven experience designing or integrating memory controllers Hands?on experience with AXI protocol Proficiency in RTL design (Verilog or VHDL) Experience with timing constraints and basic block?level testing Master's degree or Ph D Experience with version control (git, svn) Knowledge of coherency concepts and protocols Seniority level Mid?Senior level Employment type Full?time Job function Engineering and Design Semiconductor Manufacturing, Appliances, Electrical, and Electronics Manufacturing, and Computers and Electronics Manufacturing Referrals increase your chances of interviewing at Beagle by 2x Get notified about new Digital Design Engineer jobs in Barcelona, Catalonia, Spain.#J-*****-Ljbffr ## Related Videos - [How a Small Team Shrank a Microsoft Monorepo by 94%](https://www.wearedevelopers.com/videos/1236-how-a-small-team-shrank-a-microsoft-monorepo-by-94) - [10M Data Records Lost, Underwater Computing, and Psychedelic Fish - Matthias Geniar](https://www.wearedevelopers.com/videos/1908-10m-data-records-lost-underwater-computing-and-psychedelic-fish-matthias-geniar) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Develop on Windows, Deploy on Red Hat Enterprise Linux](https://www.wearedevelopers.com/videos/1600-develop-on-windows-deploy-on-red-hat-enterprise-linux) - [The Billion Dollar Machine: First Time Right.](https://www.wearedevelopers.com/videos/393-the-billion-dollar-machine-first-time-right) - [Git for Code Reviews](https://www.wearedevelopers.com/videos/429-git-for-code-reviews) ## Related Articles - [How We Built a Worry-Free System That Runs for 10+ Years – And What We’d Do Again](https://www.wearedevelopers.com/magazine/751-how-we-built-a-worry-free-system-that-runs-for-10-years-and-what-we-d-do-again) - [Top-Paying Tech Jobs (with Salaries)](https://www.wearedevelopers.com/magazine/372-top-paying-tech-jobs-with-salaries) - [Where to Find Entry-Level Software Engineering Jobs](https://www.wearedevelopers.com/magazine/397-where-to-find-entry-level-software-engineering-jobs) - [What’s the Difference between a Junior, Mid, and Senior Developer?](https://www.wearedevelopers.com/magazine/238-what-s-the-difference-between-a-junior-mid-and-senior-developer) - [Dev Digest 120 - Apple and peers](https://www.wearedevelopers.com/magazine/455-dev-digest-120-apple-and-peers) - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline)