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# Digital Design Architect - Silicon IC

- **Company:** Renesas
- **Location:** Graz, Austria
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Computer Engineering, Digital Architecture, Digital Electronics, Logic Synthesis of Circuits, Hardware Description Language, Requirements Traceability, Static Timing Analysis, SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), Application Specific Integrated Circuits, Formal Methods, Physical Design
- **Published:** August 7, 2026
- **Apply:** https://dejobs.org/x/x/B6D08B81958C4FFF8E8BCBCB5EF501FF/job/

## About the Role

* Bachelor's or Master's degree (or equivalent) in Electrical Engineering, Computer Engineering, or a related field.
 * 8+ years of experience in digital IC design , with a strong emphasis on RTL implementation and functional verification .
 * Proven track record of successful tape-outs and silicon bring-up .
 * Proficiency in HDL languages- SystemVerilog preferred -and solid experience with digital design tools (simulators, synthesis tools, static timing analysis, etc.).
 * Deep understanding of ASIC design flows , timing analysis, and design constraints.
 * Strong interpersonal and communication skills; capable of functionally leading teams and collaborating across cross-functional disciplines.
 * Demonstrated problem-solving ability and a high degree of independence in achieving design goals on schedule.

## Description

We are seeking an experienced Digital Design Architect to join our team of skilled professionals in developing innovative silicon IC designs. This role offers the opportunity to work across the full digital design flow-from requirements specification through implementation, verification, and documentation-while also providing technical leadership and direction to project teams., * Define and devise the digital architecture of the next generation NFC products

 * Lead the design and development of digital circuits for custom silicon ICs using RTL (VHDL/Verilog/SystemVerilog).
 * Drive block- and top-level RTL implementation, synthesis, and timing closure in collaboration with physical design teams.
 * Plan and execute robust functional verification strategies (UVM, directed testing, formal methods).
 * Translate system-level requirements into detailed digital design specifications and documentation.
 * Manage and ensure requirements traceability and compliance throughout the design lifecycle.
 * Collaborate effectively with analog, software, systems, and test engineering teams.
 * Serve as a technical leader or project lead-coordinating design activities, planning tasks, and mentoring junior engineers.
 * Participate in and contribute to technical documentation, design reviews, and milestone readiness assessments.


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