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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Staff Package Design Engineer - **Company:** RENESAS ELECTRONICS AMERICA INC. - **Location:** Plano, TX, United States - **Experience:** Experienced - **Contract:** Permanent contract - **Skills:** Computer-Aided Design, Adobe InDesign, Artificial Intelligence, Computing Platforms, Databases, Package Development Process, Signal Integrity, Linux Virtual Server, Software Version Control - **Published:** August 8, 2026 - **Apply:** https://dejobs.org/x/x/B63AFA99075A48299FBDF29A8F682C76/job/ ## About the Role * 4+ years of hands-on experience in package CAD layout, substrate design, or advanced package development; 6+ years preferred. * Strong background in power module packaging, FCBGA, SiP, WLCSP, advanced substrate-based packages, and multi-die/chiplet-based package architectures. * High proficiency with industry-standard package design tools such as Cadence Allegro Package Designer / SiP Layout, Siemens Xpedition Substrate Integrator, or equivalent CAD platforms. * Proven experience applying advanced package design rules, substrate vendor constraints, OSAT assembly requirements, DFM/DFA principles, and manufacturing release standards. * Experience interfacing directly with Tier-1 OSATs, substrate suppliers, foundries, silicon design teams, and product engineering teams. * Working understanding of SI/PI fundamentals, high-speed routing, impedance control, power/ground distribution, and crosstalk mitigation. * Strong communication, presentation, and technical documentation skills, with demonstrated experience working effectively in global, cross-functional engineering environments., * Bachelor's or Master's degree in Electrical Engineering, Microelectronics, Materials Science, or a related technical discipline. ## Description In this role, you will work at the intersection of IC design, advanced package development, and system-level implementation. You will play a critical role in designing and delivering next-generation, high-performance semiconductor package solutions, including power modules, chiplet-based architectures, FCBGA, SiP, WLCSP, wire-bonded, QFP, and QFN packages supporting automotive SoCs, industrial IoT microcontrollers, and AI-enabled embedded computing platforms. This role requires strong technical depth in package layout execution, manufacturability, assembly process constraints, and cross-domain co-design with global silicon design, signal integrity/power integrity, thermal, reliability, and product engineering teams., * Execute package layout design and development for advanced package technologies, including power modules, FCBGA, SiP, WLCSP, and multi-chip modules. * Develop and maintain package CAD databases, ensuring accuracy and adherence to package design guidelines, DFM, and DFA requirements to support manufacturability, yield, and long-term reliability. * Manage the package design cycle, including schematic creation, netlist import, footprint assignment, layout implementation, verification, and generation of manufacturing release outputs such as Gerber/drill data, fabrication drawings, assembly drawings, bump maps, and related documentation. * Create and modify substrate and RDL layouts, bump maps, escape routing, stack-up structures, and power/ground distribution features. * Collaborate with SI/PI, thermal, reliability, DFT, silicon design, product engineering, and manufacturing teams to support package-level co-optimization and participate in design reviews. * Ensure package designs comply with applicable foundry, OSAT, substrate vendor, and manufacturing design rules, including DRC, LVS, connectivity, and netlist verification requirements. * Support Engineering Change Order cycles, design updates, revision control, and release documentation throughout the project lifecycle. ## Related Videos - [Angular Signals: what's all the fuss about?](https://www.wearedevelopers.com/videos/684-angular-signals-what-s-all-the-fuss-about) - [Kubernetes and Microservices with Multi-Model Databases](https://www.wearedevelopers.com/videos/382-kubernetes-and-microservices-with-multi-model-databases) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Robust AIGC Provenance with Invisible Watermarking](https://www.wearedevelopers.com/videos/100222-robust-aigc-provenance-with-invisible-watermarking) - [Fault Tolerance and Consistency at Scale: Harnessing the Power of Distributed SQL Databases](https://www.wearedevelopers.com/videos/1146-fault-tolerance-and-consistency-at-scale-harnessing-the-power-of-distributed-sql-databases) - [Design as an algorithm, not as a feature](https://www.wearedevelopers.com/videos/471-design-as-an-algorithm-not-as-a-feature) ## Related Articles - [Software Engineer Career: Things You Should Know](https://www.wearedevelopers.com/magazine/143-software-engineer-career-things-you-should-know) - [Why Attend a Developer Event in 2026?](https://www.wearedevelopers.com/magazine/688-why-attend-a-developer-event-in-2026) - [What Makes WeAreDevelopers World Congress Different From Every Other Tech Event?](https://www.wearedevelopers.com/magazine/701-what-makes-wearedevelopers-world-congress-different-from-every-other-tech-event) - [Where To Find Software Engineering Jobs](https://www.wearedevelopers.com/magazine/396-where-to-find-software-engineering-jobs) - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated) - [What’s the Difference between a Junior, Mid, and Senior Developer?](https://www.wearedevelopers.com/magazine/238-what-s-the-difference-between-a-junior-mid-and-senior-developer)