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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # HITL Test Infrastructure Engineer - **Company:** Castelion Corporation - **Location:** Allen, United States - **Contract:** Permanent contract - **Skills:** Testing (Software), Board Bringup, Systems Engineering, Automation of Tests, Booting (BIOS), Code Coverage, Software Quality, Computer Engineering, Continuous Integration, Software Debugging, Distributed Systems, Embedded Software, Firmware, Field-Programmable Gate Array (FPGA), Hardware Design, IBM Hardware Management Console, Hardware-In-The-Loop Simulation, Joint Test Action (IEEE Standards), Python (Programming Language), Uptime, Software Engineering, Software Requirements Analysis, SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), Graphics Processing Unit (GPU), PIC Microcontroller, Fpga Hardware, Hardware Testing, Git, Pytest, Linux Development, Kubernetes, Information Technology - **Published:** August 9, 2026 - **Apply:** https://www.dice.com/job-detail/c062b0ce-9086-4eeb-920f-11ac488823f4 ## About the Role * Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, Software Engineering, or a related technical discipline, or equivalent practical experience. * Experience developing software using Python. * Experience building automated test frameworks using tools such as pytest, Robot Framework, or similar. * Familiarity with embedded software and firmware development workflows, including flashing, booting, debugging, and runtime validation. * Experience working with serial, JTAG, SWD, or similar hardware debug interfaces. * Basic understanding of embedded hardware and the ability to read electrical schematics. * Experience working in Linux development environments. * Basic understanding of Kubernetes, containerized infrastructure, or modern CI/CD systems. * Ability to troubleshoot issues across hardware, firmware, software, and infrastructure boundaries. * Comfortable working in a laboratory environment with custom electronics, instrumentation, power supplies, and prototype hardware. Preferred Skills and Experience * Experience developing Hardware-in-the-Loop (HITL) or automated hardware test systems. * Experience integrating hardware validation into CI/CD pipelines. * Experience with microcontrollers, FPGAs, GPUs, SoCs, or custom embedded compute platforms. * Experience with board bring-up, lab automation, instrument control, power sequencing, or custom power delivery systems. * Familiarity with FPGA development workflows, including VHDL, Verilog, or SystemVerilog. * Experience reading FPGA code to understand interfaces, expected behavior, and verification requirements. * Experience with Git-based software development workflows. * Experience building hardware reservation, orchestration, or resource scheduling systems. * Experience with networking, distributed systems, or Kubernetes-based infrastructure. * Experience developing scalable engineering infrastructure supporting multiple development teams., While this position does not currently require a U.S government-issued security clearance, it may in the near future. Therefore, the ability to obtain and maintain a U.S. government-issued security clearance is required. ## Description As a HITL Test Infrastructure Engineer, you will architect, develop, and own Castelion's Hardware-in-the-Loop (HITL) test infrastructure used to verify embedded software and firmware running on flight-critical hardware. Your systems will enable developers and automated CI/CD pipelines to reserve physical hardware, deploy software and firmware, execute automated tests, and rapidly validate system performance using production-representative hardware. You'll work across software, firmware, avionics, FPGA, electrical, and systems engineering teams to build scalable, resilient, and highly automated test environments supporting microcontrollers, FPGAs, GPUs, and custom electronics. Your work will significantly improve development velocity and software quality by providing engineers with fast, reliable feedback before hardware reaches the vehicle. At Castelion, engineers own their systems from concept through production. You'll design infrastructure that is robust, maintainable, intuitive to use, and capable of scaling alongside our rapidly growing engineering organization. Responsibilities * Design, develop, and own Castelion's Hardware-in-the-Loop (HITL) test infrastructure for embedded software and firmware verification. * Build scalable HITL test stations capable of supporting microcontrollers, FPGAs, GPUs, and custom compute hardware with specialized power and interface requirements. * Develop automated test frameworks that verify software loading, boot sequences, runtime performance, functional behavior, and system requirements. * Integrate HITL systems into Kubernetes and CI/CD workflows, enabling developers and automated verification pipelines to reserve hardware, flash devices, execute tests, and review results. * Develop Python-based test software, automation tools, and infrastructure to maximize test coverage and engineering productivity. * Design automated test execution strategies for code commits, pull requests, nightly builds, release candidates, and other development milestones. * Build reliable hardware reservation, scheduling, and resource management capabilities that maximize lab utilization. * Partner closely with software, firmware, FPGA, avionics, electrical, and systems engineers to define verification requirements and expand automated test coverage. * Debug complex issues spanning hardware, firmware, software, networking, and infrastructure. * Continuously improve the reliability, scalability, uptime, automation, and user experience of Castelion's HITL infrastructure. * Support board bring-up, hardware integration, lab automation, and prototype testing activities as new hardware platforms are introduced. * Establish best practices for automated verification, hardware management, and continuous integration across engineering teams. ## Related Videos - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [pytest: Simple, rapid and fun testing with Python](https://www.wearedevelopers.com/videos/213-pytest-simple-rapid-and-fun-testing-with-python) - [DevOps at Netflix](https://www.wearedevelopers.com/videos/270-devops-at-netflix) - [How a Small Team Shrank a Microsoft Monorepo by 94%](https://www.wearedevelopers.com/videos/1236-how-a-small-team-shrank-a-microsoft-monorepo-by-94) - [Automagic Configuration in Python](https://www.wearedevelopers.com/videos/363-automagic-configuration-in-python) - [Leading with Reliability: Applying SRE Principles to Build Stronger Engineering Organizations](https://www.wearedevelopers.com/videos/100185-leading-with-reliability-applying-sre-principles-to-build-stronger-engineering-organizations) ## Related Articles - [Should senior developers refuse interview coding challenges?](https://www.wearedevelopers.com/magazine/29-should-senior-developers-refuse-interview-coding-challenges) - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline) - [The 8 Best Code Testing Tools](https://www.wearedevelopers.com/magazine/402-the-8-best-code-testing-tools) - [Top 6 Hackathons for Developers in 2023](https://www.wearedevelopers.com/magazine/263-top-6-hackathons-for-developers-in-2023) - [Dev Digest 132 - Binging WADFlix?](https://www.wearedevelopers.com/magazine/473-dev-digest-132-binging-wadflix) - [Dev Digest 134 - Where pixels sing?](https://www.wearedevelopers.com/magazine/477-dev-digest-134-where-pixels-sing)