> Markdown version of [/jobs/ext/2001333-fpga-engineer-timing-granada-spain](https://www.wearedevelopers.com/jobs/ext/2001333-fpga-engineer-timing-granada-spain). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Fpga Engineer. Timing. Granada, Spain - **Company:** Safransed - **Location:** Granada, Spain - **Contract:** Permanent contract - **Skills:** UClibc (C Standard Library), Serialization, Software Debugging, Logic Synthesis of Circuits, Linux on Embedded Systems, Embedded Software, Ethernet, Firmware, Field-Programmable Gate Array (FPGA), Global Positioning Systems (GPS), Linux Kernel, Software Engineering, Subversion, System on a Chip, Verilog, VHSIC Hardware Description Language (VHDL), Virtual Local Area Networks, Vivado, Data Server Interface, Git, Information Technology, Build Tools, Software Version Control, GNSS - **Published:** August 9, 2026 - **Apply:** https://www.buscojobs.com.es/fpga-engineer-timing-granada-spain-en-granada-ID-366777887 ## About the Role Master's Degree in Telecommunications, Software Engineering, Computer Science, or related. Excellent written and dissemination skills in English (advanced Cambridge certificate or similar, at least similar speaking skills). General knowledge of software engineering and development, embedded Linux, and Linux kernel drivers. Passion, energy, and high motivation to participate in industrial R&D projects and initiatives. Teamwork, organization skills, autonomous work, and project management. Required experience in: Knowledge of Xilinx FPGA tools and platforms (Vivado, Vitis, HLS, ...). General understanding of embedded software development, debugging, FPGA logic design and verification. FPGA logic design (VHDL/Verilog, test bench implementation, debugging, timing closure, ...). Provable experience successfully implementing and debugging FPGA IP cores for different project requirements, such as network accelerators, image processing extensions, ... Extensive experience in repositories and version control systems (Git, SVN, ...). Desirable experience in: Knowledge of Ethernet networking, such as link layer protocols, Ethernet MAC, data switching, VLAN and *****Q standards. Previous experience with other data interfaces, such as Aurora, GMII, SGMII, RGMII, RapidIO serialization, PHY modules, or the Xilinx GTx transceivers. Prior knowledge of timing, synchronization, and frequency dissemination (PTP, NTP, SyncE, or othes). Previous experience in R&D projects. Knowledge of the Xilinx architecture and platforms, e.g., Zynq-****, UltraScale, Zynq-MPSoC. Knowledge of embedded Linux tools and build systems (e.g., Buildroot, Petalinux, ...). ## Description We're looking for an FPGA Engineer to join our Technology Exploration Unit team in Granada, Spain.Las cualificaciones, habilidades y toda la experiencia relevante necesaria para este puesto se pueden encontrar en la descripción completa a continuación.Our TechnologyWe are the world leader in Resilient Positioning, Navigation and Timing (R-PNT) solutions that improve the reliability, performance, and safety of critical applications, and high-risk operations, even in GPS/GNSS-denied environments.We provide virtually fail-safe GNSS and PNT solutions for military and commercial applications worldwide, and ultra-precise synchronization (sub-ns) and frequency distribution for applications requiring a high degree of reliability and precision through White Rabbit PTP.In addition, Safran has great expertise in Time Sensitive Networking (TSN) through several projects in the framework of aerospace with ESA to provide deterministic communications with zero-packet loss.Overall, we deliver highly dependable solutions that always have high accuracy and robust timing at their core.The PositionAs an assistant R&D engineer, you will be a key member of our Technology Exploration Unit in Granada, Spain.You will be involved in research and development tasks in the areas of telecommunications and deterministic networking.What you'll be doingYou will have responsibility for understanding requirements, developing innovative projects, planning new features, and ensuring that all developments are delivered according to specification.We are all about improvement, so you will be able to identify opportunities to improve product performance, efficiency, and design.You will use your critical thinking and problem-solving skills to ensure the highest quality for the results considering scheduling, budget, and effort constraints.You will work with the latest and greatest in Resilient PNT and deterministic technologies!You will have effective, constant communication with other project partners and project managers all the way from the kick-offs to the stakeholder meetings.You will participate in internal meetings to build a comprehensive work plan, manage the budget and personnel effort for projects.You will write deliverables, dissemination material, assist in project-related communication activities, and attend workshops and other events.You will be developing the key firmware and FPGA elements of different prototypes for TSN networking.Validation of the design will be an important part of the position, and you will be expected to produce test benches, simulations, and experimental evaluation strategies to verify the prototypes.What you bring to SafranMaster's Degree in Telecommunications, Software Engineering, Computer Science, or related.Excellent written and dissemination skills in English (advanced Cambridge certificate or similar, at least similar speaking skills).General knowledge of software engineering and development, embedded Linux, and Linux kernel drivers.Passion, energy, and high motivation to participate in industrial R&D projects and initiatives.Teamwork, organization skills, autonomous work, and project management.Required experience in:Knowledge of Xilinx FPGA tools and platforms (Vivado, Vitis, HLS, ...).General understanding of embedded software development, debugging, FPGA logic design and verification.FPGA logic design (VHDL/Verilog, test bench implementation, debugging, timing closure, ...).Provable experience successfully implementing and debugging FPGA IP cores for different project requirements, such as network accelerators, image processing extensions, ...Extensive experience in repositories and version control systems (Git, SVN, ...).Desirable experience in:Knowledge of Ethernet networking, such as link layer protocols, Ethernet MAC, data switching, VLAN and *****Q standards.Previous experience with other data interfaces, such as Aurora, GMII, SGMII, RGMII, RapidIO serialization, PHY modules, or the Xilinx GTx transceivers.Prior knowledge of timing, synchronization, and frequency dissemination (PTP, NTP, SyncE, or othes).Previous experience in R&D projects.Knowledge of the Xilinx architecture and platforms, e.g., Zynq-****, UltraScale, Zynq-MPSoC.Knowledge of embedded Linux tools and build systems (e.g., Buildroot, Petalinux, ...).The keys of our offerBe part of a leading and expanding company.Health insurance.Flexible work schedule.International and dynamic work environment in Granada, Spain.High possibilities to grow inside the company.xqbhyrxProfessional Career Plan.#J-*****-Ljbffr ## Related Videos - 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