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# RTL Design Engineer

- **Company:** Meridian
- **Location:** United States (Remote available)
- **Experience:** Expert
- **Salary:** $170,000.0 - $175,000.0
- **Contract:** Permanent contract
- **Skills:** Electronic Design Automation, Perl (Programming Language), Python (Programming Language), PCI Express, Static Timing Analysis, SystemVerilog, Tcl (Programming Language), Verilog, Scripting, Code Inspection, Front End Software Development
- **Published:** May 16, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=c05f7e6703f76820

## About the Role

Do you have experience in Verilog?, * Proficient in Verilog/System Verilog coding constructs.

 * Knowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power static checkers, linting)
 * Experience with high speed PCIe designs and protocols.
 * Experience with Industry standard interface protocols such as AXI, APB, etc.
 * Experience with ARM Fabric IPs.
 * Experience with IPXACT.
 * Understanding of Computer Architecture fundamentals.
 * Ability to write scripts using Python, Tcl, Perl etc.
 * Experience in EDA tools such as VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus.
 * Proficiency with UPF (Low power intent)
 * Proficiency in clock crossing techniques.
 * Knowledge of Static Timing Analysis and understanding of timing signoff fundamentals.

What we are looking for:

 * Good in understanding RTL Design and Digital concepts
 * Strong experience with EDA tools: Fusion Compiler, CDC
 * Scripting: Pearl, Python, TCL
 * At-least 5+ years of experience in Verilog Design
 * AMBA AXI bus along-with ARM or C based processor
 * Ensure customer satisfaction.
 * Reporting to customers on daily or weekly progress effectively



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