> Markdown version of [/jobs/ext/202007-staff-sr-staff-rtl-design-engineer-qgov](https://www.wearedevelopers.com/jobs/ext/202007-staff-sr-staff-rtl-design-engineer-qgov). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Staff/Sr. Staff RTL Design Engineer - QGOV - **Company:** Qualcomm - **Location:** Boulder, CO, United States (Remote available) - **Experience:** Expert - **Salary:** $147,600.0 - $246,000.0 - **Contract:** Permanent contract - **Skills:** ARM Architecture, Boolean Algebra, Computer Engineering, Microarchitecture, Software Debugging, Digital Arts, Logic Synthesis of Circuits, Perl (Programming Language), Emulators, Firmware, Field-Programmable Gate Array (FPGA), Python (Programming Language), Node.Js, PCI Express, Reduced Instruction Set Computing, Subsystems, SystemVerilog, Universal Asynchronous Receiver/Transmitter, Verilog, Scripting, PIC Microcontroller, Application Specific Integrated Circuits, Software Troubleshooting, Information Technology, Low Latency, Code Inspection - **Published:** May 19, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=9a7f9c352850bf2c ## About the Role * 6-10+ years of work experience with RTL/FPGA design (Verilog, System verilog), embedded system architecture and Verification * Bachelor's degree in computer science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR Master's degree in computer science, Electrical/Electronics Engineering, Engineering, or related field and 5+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field., * Positive Attitude: Bring a fun-loving attitude and a passion for inclusively solving problems. * Experience: 5+ years of ASIC design experience * RTL Expertise: System Verilog Design, Linting, CDC, Synthesis (FPGA and ASIC) * Testing: Building the test suites for design validation * Emulation: understanding of Emulation and prototyping flows for the design and validation in Lab is a big Plus. * Complex Digital Logic Design: Experience with designing complex digital logic blocks and sub systems (CPU, GPU, DSP, Always on Systems, Digital interfaces (PCIe, UART, I2c, DDRx, SPI, USB). * ISA Familiarity: Knowledge of ISAs (Instruction Set Architectures) such as ARM THUMB or RISC-V. * Processor/Microcontroller System Design: Understanding of processor or microcontroller system design. * Multi-Power Domain and Multi-Clock Domain Designs: Experience with designs spanning multiple power domains and clock domains. * Scripting/Automation Languages: Proficiency in scripting or automation languages like Python or Perl. * Industry Standard Digital Tools: Familiarity with state-of-the-art industry-standard digital design tools. * Challenges of Lower Node Technologies: Awareness of challenges faced when working with lower node technologies. If you're excited about pushing the boundaries of digital design and collaborating with diverse teams, we encourage you to apply!, * Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience., Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. ## Description As a Design Engineer, you'll play a critical role in shaping cutting-edge digital designs. Your responsibilities will include: * Micro-Architecture: Designing micro-architecture for both simple and complex digital, interface blocks. * RTL Development: Developing RTL (Register Transfer Level) code using industry best practices. This includes handling multi-clock designs, high-frequency requirements, low power, and low latency considerations while ensuring high performance. * Debugging and Post-Silicon Bring-Up: Troubleshooting and debugging issues during the development process and supporting post-silicon bring-up activities. * Documentation: Creating comprehensive design documentation to ensure clarity and maintainability. * Design Optimization: Optimizing designs for key metrics such as area, power, and performance. * Cross-Functional Collaboration: Collaborating with cross-functional teams, including DFT (Design for Testability), Implementation, Verification, Emulation, and Firmware teams. **Must be in San Diego full time, 5 days a week Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information. ** Must be a U.S. citizen and eligible to receive a U.S. Government security clearance ** ## Related Videos - [Stop using Node.js like in 2020! What changed and what you can do today with Node.js](https://www.wearedevelopers.com/videos/100011-stop-using-node-js-like-in-2020-what-changed-and-what-you-can-do-today-with-node-js) - [Playing Pong on a shoulder press machine](https://www.wearedevelopers.com/videos/100140-playing-pong-on-a-shoulder-press-machine) - [Quantum Computing - The tiny and the big challenges](https://www.wearedevelopers.com/videos/934-quantum-computing-the-tiny-and-the-big-challenges) - [Stop Using Node.js Like It’s 2020! - Alfonso Graziano](https://www.wearedevelopers.com/videos/1863-stop-using-node-js-like-it-s-2020-alfonso-graziano) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Agent Smith Gets Hardware: Autonomous IoT Hacking From Debug Port to Cloud API](https://www.wearedevelopers.com/videos/100258-agent-smith-gets-hardware-autonomous-iot-hacking-from-debug-port-to-cloud-api) ## Related Articles - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline) - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated) - [Where to Find Entry-Level Software Engineering Jobs](https://www.wearedevelopers.com/magazine/397-where-to-find-entry-level-software-engineering-jobs) - [How to Write a CV and Interview if You Don't Fully Qualify For The Job](https://www.wearedevelopers.com/magazine/183-how-to-write-a-cv-and-interview-if-you-don-t-fully-qualify-for-the-job) - [Dev Digest 120 - Apple and peers](https://www.wearedevelopers.com/magazine/455-dev-digest-120-apple-and-peers) - [How Much FAANG Companies Actually Pay Software Engineers in 2025](https://www.wearedevelopers.com/magazine/230-how-much-faang-companies-actually-pay-software-engineers-in-2025)