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# Principal Applications Engineer

- **Company:** Marvell
- **Location:** Santa Clara, CA, United States
- **Contract:** Permanent contract
- **Skills:** Application Programming Interfaces (APIs), Data Infrastructure, Software Debugging, Ethernet, Firmware, PCI Express, Release Management, Signal Integrity, Application Specific Integrated Circuits, Pcb Layout
- **Published:** August 11, 2026
- **Apply:** https://us.experteer.com/career/view-jobs/principal-applications-engineer-santa-clara-ca-usa-58896437

## About the Role

and end-to-end with root-cause analysis and resolution * Analyze signal integrity via PCB layout review, simulations, and S-parameter analysis * Utilize high-speed test equipment to isolate and debug lab issues * Create and deliver customer-facing technical collateral (integration guides, notes, API docs) * Present program status and findings to customer teams and leadership * Collaborate cross-functionally with IP design, DSP/firmware, customer engineers, and SoC architects Tasks * Proven SerDes IP integration and silicon bringup experience * Strong signal integrity foundation, SerDes equalization, and end-to-end debugging * Experience with switch, custom ASIC, or connectivity programs (PCIe, Ethernet, D2D) * Ability to manage multiple customer engagements independently across full technical lifecycle * Excellent communication skills Key requirements * employee stock purchase plan * family support programs * robust mental health resources * recognition and service awards

## Description

Experteer Overview In this role you interface with Marvell's Central Engineering IP team and customers to enable SerDes IP integration across customized ASIC and switch programs. You will drive multi-disciplinary collaboration for silicon bringup, validate interfaces, and resolve complex signal integrity challenges. The position sits in a hybrid Santa Clara setup, with travel to customer sites for silicon bringup and support. You will influence SoC integration programs and deliver customer-ready technical guidance and documentation, contributing to Marvell's high-speed data infrastructure solutions. Compensation / Benefits * Lead SerDes IP integration and customer bringup from design review to production release * Coordinate engineering resources across IP design, firmware, and validation teams * Diagnose and resolve signal integrity issues across multi-data-rate SerDes and analog IPs * Support high-speed interfaces including Ethernet, PCIe, CPRI, JESD, and CEI * Own customer escalations end-to-end with root-cause analysis and resolution * Analyze signal integrity via PCB layout review, simulations, and S-parameter analysis * Utilize high-speed test equipment to isolate and debug lab issues * Create and deliver customer-facing technical collateral (integration guides, notes, API docs) * Present program status and findings to customer teams and leadership * Collaborate cross-functionally with IP design, DSP/firmware, customer engineers, and SoC architects Tasks * Proven SerDes IP integration and silicon bringup experience * Strong signal integrity foundation, SerDes equalization, and end-to-end debugging * Experience with switch, custom ASIC, or connectivity programs (PCIe, Ethernet, D2D) * Ability to manage multiple customer engagements independently across full technical lifecycle * Excellent communication skills Key requirements * employee stock purchase plan * family support programs * robust mental health resources * recognition and service awards


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