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# Digital Verification Engineer I

- **Company:** Silicon Labs
- **Location:** Austin, TX, United States
- **Experience:** Starter
- **Salary:** $84,000.0 - $156,000.0
- **Contract:** Internship / Graduate position
- **Skills:** C (Programming Language), Mobile Broadband Modems, Very-Large-Scale Integration, Automation of Tests, Computer Programming, Computer Engineering, Data Transmissions, Software Debugging, Logic Synthesis of Circuits, Digital Technology, Perl (Programming Language), Formal Verification, Field-Programmable Gate Array (FPGA), Python (Programming Language), SystemVerilog, Verilog, Scripting, Application Specific Integrated Circuits
- **Published:** May 21, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=201c943ce12ed267

## About the Role

Do you have experience in Verilog?, Do you have a Master's degree?, * Bachelor's, Master's, or PhD degree in Electrical Engineering, Computer Engineering, or a related field.

 * Experience with Verilog and SystemVerilog for digital design and verification through professional setting, internships, coursework, research, or project work.

 * Programming and scripting experience in C and scripting languages such as Python, Perl, or similar.

 * Understanding of digital design fundamentals, computer architecture, VLSI concepts, or embedded systems.

 * Hands-on experience with simulation, debugging, or FPGA prototyping through academic or internship projects.

 * Strong analytical, problem-solving, and communication skills.

The following qualifications will be considered a plus:

 * Knowledge of UVM (Universal Verification Methodology).

 * Exposure to ASIC or IP verification methodologies and tools.

 * Experience debugging complex digital systems and analyzing simulation failures.

 * Familiarity with digital communication systems or wireless modem architectures.

 * Prior internship or project experience related to verification, RTL development, or semiconductor design.

## Description

* Contribute to the verification of ASIC IP blocks used in wireless modem designs for IoT applications.

 * Develop and maintain verification environments, testbenches, and simulations using Verilog and SystemVerilog.

 * Support automated testing and verification flows through C programming and scripting.

 * Analyze simulation results, identify root causes of failures, and debug design or verification issues in collaboration with cross-functional engineering teams.

 * Participate in verification planning, test development, coverage analysis, and regression execution.

 * Document verification results, communicate technical findings, and contribute ideas to improve methodologies and workflows.

 * Collaborate with design, architecture, and software teams to ensure high-quality IP delivery.


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