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# ASIC Test Engineer

- **Company:** Niederlassung Regensburg
- **Location:** Regensburg, Germany
- **Contract:** Permanent contract
- **Skills:** Code Coverage, Data Integrity, Software Debugging, Logic Synthesis of Circuits, Software Architecture, Application Specific Integrated Circuits
- **Published:** August 13, 2026
- **Apply:** https://dejobs.org/x/x/DCD5639EE14A41188E4EAB5E95B118F5/job/

## About the Role

and data integrity + Taking full responsibility silicon characterization across process, voltage, and temperature (PVT) to validate new product features + Setting up and maintaining comprehensive technical documentation for test concept, test programs, and procedures + Releasing ATE test solutions to manufacturing and support ongoing production quality related to test coverage **Qualifications** + Academic degree in Electrical Engineering, Microelectronics, Physics, or comparable qualification + Several years of professional experience in ASIC test engineering + Experience in yield analysis, test optimization, and product ramp-up + Advanced ATE test development & program architecture DFT strategy, architecture, and implementation + Test concepts for complex analog, mixed-signal and digital ASICs + Deep understanding of analog and mixed-signal circuit design and simulation + Strong knowledge of digital design and verification methodologies +, Solid understanding of semiconductor

## Description

design-for-test team, you develop an ATE test concept and ATE test program for the ASIC that can be used and refined for series production when moving from the development to the production stage. Your tasks will focus on the following activities: + Responsibility for defining, developing and maintaining ATE test programs for wafer test and final test + Debugging HW/SW test issues and improve test stability + Supporting production ramp, safelaunch, and sustaining activities + Acting as a technical expert and sparring partner for the worldwide design, DFT, and product engineering teams + Architecting and developing scalable ATE test concepts and test flows for wafer sort and final test + Taking ownership of the validation strategy for implemented test functionalities and concepts, including defining verification approaches and driving cross-platform consistency + Ensuring alignment and correlation of test results between bench/system-level and ATE to secure high measurement accuracy


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