> Markdown version of [/jobs/ext/2043159-digital-verification](https://www.wearedevelopers.com/jobs/ext/2043159-digital-verification). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md).

---

# Digital Verification

- **Company:** NXP
- **Location:** Austin, TX, United States
- **Salary:** $121,000.0
- **Contract:** Internship / Graduate position
- **Skills:** Very-Large-Scale Integration, Software Debugging, Logic Synthesis of Circuits, Formal Verification, Python (Programming Language), SystemVerilog, Verilog, Electrical and Computer Engineering, Programming Languages
- **Published:** August 13, 2026
- **Apply:** https://nxp.wd3.myworkdayjobs.com/careers/job/Austin-Oakhill-Office/Digital-Verification_R-10066238

## About the Role

Master's degree in Electrical and Computer Engineering, Electronics Engineering, foreign equivalent or related field., Position requires knowledge gained via completion of a university-level course, internship or related occupation involving:

 1. Programming Languages C/Python;

 2. Verilog and System Verilog;

 3. Verification skills utilizing UVM (Universal Verification Methodology);

 4. Computer Architecture;

 5. Digital Design with FGPA;

 6. VLSI System Design;

 7. Verilog RTL debugging utilizing waveforms and source code browsing; and

 8. Code and Functional Coverage generation and closure.

## Description

Duties: Performs semiconductor design engineering duties including design, development, and testing for firm products and devices in conjunction with product development for the electronic communications industry. Define and write IP verification plans based on requirements documents (industry standards, product requirements, IP architecture and IP implementation specifications). Write System Verilog (UVM) monitors, drivers, response checkers and System Verilog Assertion (SVA) cover properties to match the verification plans. Developing and maintaining portions of a verification environment including scripts and Make files. Debug failing test cases to determine source of failure and track resolution. Collect code and functional coverage results from random simulations, and analyzing uncovered events to determine additional test scenarios needed for coverage. Perform assertion-based formal verification of blocks and IPs to ensure they meet requirements


## Related Videos

- [Using AI Without Losing Your Skills](https://www.wearedevelopers.com/videos/2045-using-ai-without-losing-your-skills)
- [When testing just doesn’t cut it](https://www.wearedevelopers.com/videos/720-when-testing-just-doesn-t-cut-it)
- [What I learned as a developer from accidents in space](https://www.wearedevelopers.com/videos/642-what-i-learned-as-a-developer-from-accidents-in-space)
- [Strange New Worlds: shaping the future of the digital age](https://www.wearedevelopers.com/videos/677-strange-new-worlds-shaping-the-future-of-the-digital-age)
- [Fireside Chat with Lea](https://www.wearedevelopers.com/videos/551-fireside-chat-with-lea)
- [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips)

## Related Articles

- [Best Coding Boot Camps in Germany](https://www.wearedevelopers.com/magazine/237-best-coding-boot-camps-in-germany)
- [How software is steering vehicle technology](https://www.wearedevelopers.com/magazine/515-how-software-is-steering-vehicle-technology)
- [What is Software Engineering?](https://www.wearedevelopers.com/magazine/289-what-is-software-engineering)
- [The Netherlands – Europe’s powerhouse for software development?](https://www.wearedevelopers.com/magazine/31-the-netherlands-europe-s-powerhouse-for-software-development)
- [Where to Find Entry-Level Software Engineering Jobs](https://www.wearedevelopers.com/magazine/397-where-to-find-entry-level-software-engineering-jobs)
- [PyLadies Vienna](https://www.wearedevelopers.com/magazine/144-pyladies-vienna)