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# Sr. Software Engineer, AI Hardware Architecture Simulation

- **Company:** Tesla Motors
- **Location:** Palo Alto, CA, United States
- **Experience:** Expert
- **Salary:** $140,000.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Compilers, Software Debugging, Integrated Development Environments, Program Analysis, Hardware Testing, Information Technology, Hardware Acceleration
- **Published:** August 14, 2026
- **Apply:** https://diversityjobs.com/main/sendform/8/8/28176/1/15914277?backUrl=%2Fcareer%2F15914277%2FSoftware-Engineer-Ai-Hardware-Architecture-Simulation-California-Palo-Alto

## About the Role

* Exceptional C++ programming ability and comfortable with assesmbly when the metal matters
 * Prior industry or research experience in compilers, program analysis,simulators,and/or hardware testing
 * Deep experience with compilers, program analysis, cycle-accurate or functional simulators, or hardware verification/testing
 * Evidence that you can take ownership of complex systems and drive them to production quality under real pressure
 * Degreein Engineering, Computer Science, or equivalent in experience and evidence of exceptional ability

## Description

paid holidays, flex time, 401(k)
United States, California, Palo Alto
Jul 29, 2026
What to Expect

You'renot just writing simulators.You'rebuilding the digital twin ofthe siliconthat will run the most important real-world AI on Earth - and eventually beyond it.

Tesla's next-generation inference chips (AI6 and Dojo 3) are being designed to extract the maximum usable intelligence from every square millimeter of silicon. Your job is to make sure that silicon is correct, fast, and reliablebeforethe firstwafer evercomes back. You will create the pre-silicon development environment that lets the entire AI hardware and software stack move at the speed of first principles instead of the speed of foundry cycles.
What You'll Do

 * Own and evolve high-fidelity functional simulators for our custom AI accelerators - the tools that let architects and software teams explore the design space while the hardware is still electrons on a screen
 * Build and harden the compiler and hardware-monitoring tooling that turns abstract models into production-grade silicon
 * Invent smarter analysis and bug-detection algorithms that catch the subtle, nasty failures that only appear at massive scale and parallelism
 * Debug the full stack - compiler bugs, defective silicon behavior, microarchitectural corner cases - on systems that push the limits of what parallel compute can do
 * Sit at the intersection of hardware architecture and software, constantly feeding real insights back into the next generation of chips so they become more reliable, more efficient, and more powerful


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