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# Staff HBM Design Architect - DFT

- **Company:** Micron Technology, Inc.
- **Location:** Folsom, CA, United States
- **Experience:** Expert
- **Salary:** $146,000.0 - $297,000.0
- **Contract:** Permanent contract
- **Skills:** Computer Engineering, Dynamic Random-Access Memory, Joint Test Action (IEEE Standards), Application Specific Integrated Circuits, System-level Testing
- **Published:** August 15, 2026
- **Apply:** https://www.juju.com/job/00000000gn71as

## About the Role

+ Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field

 + Strong knowledge of scan, MBIST, JTAG, and boundary scan concepts

 + Experience with wafer probe and final test semiconductor flows

 + 5+ years of experience in DRAM or ASIC DFT design or verification

Preferred Qualifications:

 + Experience with HBM, DRAM, or advanced memory products

 + Knowledge of TSV-based 3D integration and stacked-die test challenges

 + Hands-on experience with at-speed test or advanced DFT techniques

 + Exposure to DFT security features or custom customer test interfaces

## Description

As an HBM Design Architect, you will define how next-generation HBM products are tested from wafer to system. This role is critical to ensuring quality, yield, and performance across complex multi-die architectures. You'll influence product success early, work hands-on with silicon, and partner closely with design, test, and manufacturing teams.

Responsibilities:

 + Define and implement end-to-end DFT architectures for HBM base die and DRAM die

 + Develop DFT strategies for stacked-die, cube-level, and system-level test flows

 + Architect test access mechanisms supporting wafer probe through final test


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