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# Sr Digital Design Engineer

- **Company:** Micron View all jobs
- **Location:** Boise, ID, United States
- **Experience:** Expert
- **Salary:** $92,300.0 - $166,850.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Digital Arts, Logic Synthesis of Circuits, Dynamic Random-Access Memory, Static Timing Analysis, SystemVerilog, Verilog, Application Specific Integrated Circuits, Front End Software Development, Physical Design
- **Published:** August 16, 2026
- **Apply:** https://www.careerjet.com/job/usd8c0dbec62ad44e5f3fda7d60d4b0166/eaa

## About the Role

* Master's degree in Electrical Engineering (or equivalent) with 4+ years of experience, or Bachelor's degree with 5+ years of experience in digital ASIC/RTL design.
 * Proven experience developing RTL for complex digital designs from specification through implementation handoff.
 * Strong knowledge of ASIC front-end design flows including RTL design, functional verification, logic synthesis, CDC/RDC analysis, and static timing analysis (STA).
 * Experience developing and maintaining design constraints (SDC), including clocks, timing exceptions, I/O constraints, and multi-mode multi-corner timing scenarios
 * Proficiency with Verilog/SystemVerilog and industry-standard simulation tools.
 * Experience with low-power design methodologies, UPF-based power intent, timing constraints, and PPA optimization., * Experience developing RTL for memory products or other high-performance digital designs.
 * Familiarity with CMOS digital and mixed-signal circuit concepts.
 * Experience collaborating across architecture, verification, and physical implementation teams to resolve integration and design challenges.
 * Demonstrated ability to improve engineering productivity through process improvements, automation, and enhanced design methodologies.
 * Strong communication, problem-solving, and teamwork skills, with the ability to demonstrate AI-assisted technologies and generative AI tools to improve engineering efficiency and collaboration.

## Description

Micron is seeking a Senior Digital Design Engineer to contribute to the development of advanced DRAM digital and mixed-signal blocks. This role is responsible for RTL design, implementation, synthesis, timing analysis, power optimization, and design quality throughout the RTL-to-GDS flow. The engineer will collaborate with architecture, verification, and physical design teams to deliver high-performance, power-efficient designs that meet product specifications and PPA (Power, Performance, Area) objectives for next-generation memory products.
Responsibilities

 * Design, develop, and deliver RTL for complex DRAM digital and mixed-signal blocks, ensuring alignment with product specifications and performance targets.
 * Perform front-end design quality checks including linting, CDC/RDC analysis, logic synthesis, timing constraint development, and timing closure activities.
 * Collaborate with architecture, verification, and physical design teams to optimize power, performance, area (PPA), and overall design quality.
 * Develop and maintain synthesis and timing constraints (SDC), analyze timing reports, and drive timing closure across multiple operating scenarios.
 * Improve design methodologies, automation, and RTL-to-GDS flows to enhance development efficiency, design quality, and time-to-market., Description We are seeking Senior & Lead Transmission Line Engineers (multiple positions) who will work as members of a dynamic team working in a fast-paced environment, solving …
 + 14 days ago


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