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# Chief FPGA/DSP Architect

- **Company:** Intellectual Capital Resources Limited
- **Location:** Cambridge, UK
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Bluetooth, C++ (Programming Language), Data Transmissions, Field-Programmable Gate Array (FPGA), Hardware Design, Python (Programming Language), MATLAB, Radio-Frequency Identification, Signal Processing, Systems Architecture, Systems Integration, Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Fpga Hardware, Software Defined Radio
- **Published:** August 18, 2026
- **Apply:** https://find.jobs/jobs-near-me/apply/ats-redirect/?id=2931714761-2

## About the Role

They are looking for an FPGA Engineer with the following background:
Strong FPGA development experience using VHDL or Verilog
Experience with DSP and digital communication systems
Understanding of SDR platforms and modem architectures
Familiarity with modulation, filtering, FFTs, or error correction techniques
Experience with Xilinx/Vivado toolchains
Knowledge of Python, C++, or MATLAB would be beneficial
Exposure to Bluetooth or wireless protocols, RF systems, or low-power hardware design would be advantageous.

## Description

We are supporting a specialist wireless technology company developing advanced software-defined radio and Bluetooth analysis platforms used by some of the world's leading semiconductor and consumer technology companies. They are looking to add an FPGA Engineer to their team, working on high-performance DSP and communication systems.
This role offers the opportunity to work across both low-level signal processing and wider system architecture, contributing to products designed for next-generation wireless development and test environments. You'll work closely with RF, embedded, and protocol engineers in a highly technical and collaborative environment.
The position will involve developing FPGA-based DSP pipelines, implementing modem and signal-processing functions, and contributing to the architecture of SDR platforms. You'll also play a role in optimisation, feature development, and system-level integration across hardware and software domains.


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