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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # FPGA Engineer, Networking & Security - **Company:** Muon Space Inc - **Location:** San Jose, CA, United States - **Experience:** Expert - **Salary:** $184,000.0 - $208,000.0 - **Contract:** Permanent contract - **Skills:** Link Aggregation (Ethernet), Cyber Security, Computer Engineering, Deep Packet Inspection, Ethernet, Firmware, Field-Programmable Gate Array (FPGA), Hardware Description Language, Internet Protocol Security (IP SEC), Network Packet, Virtual Private Networks (VPN), Network Architecture, Open Source Technology, SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), Data Processing, High Performance Computing, Firewalls (Computer Science), Build Management, Information Technology, Routing & Switching - **Published:** August 21, 2026 - **Apply:** https://www.dice.com/job-detail/a125870a-12d3-4462-acb5-3a325fb019ea ## About the Role * Bachelor's or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field, plus 5+ years of professional FPGA engineering experience, with a specialization in networking, cryptography, security, or high-speed I/O. * Deep, hands-on experience with Ethernet, link aggregation, and signal-integrity considerations, specifically at higher direct attached copper (DAC) lane rates. * Strong practical experience applying cryptographic algorithms in hardware or firmware: AES, AES-GCM, ECC, IPSec/VPN handshakes, and familiarity with post-quantum cryptography (PQC). * Working knowledge of FEC schemes, particularly Reed-Solomon, and the ability to translate BER and link-budget requirements into concrete FEC implementations. * Proven experience defining network packet flows, switching/routing/filtering, deep packet inspection, firewalling, and VPN termination in embedded or FPGA-based systems. * Strong HDL/RTL skills (SystemVerilog, Verilog, or VHDL) and familiarity with modern FPGA verification methodologies. * Excellent written and verbal communication skills, including the ability to author white papers and architectural documents. * Ability and willingness to obtain and maintain a U.S. security clearance. Active clearance is a plus. Nice-to-Have Skills * Experience with a variety of spacecraft networks including Ethernet and SpaceWire. * Experience implementing or integrating NoC (network on chip) fabrics on FPGA. * Familiarity with space-grade or rad-tolerant FPGA platforms. * Prior work on spacecraft avionics, payload data handling, or secure space-to-ground links. * Contributions to standards bodies, open-source cryptographic implementations, or published research. ## Description Muon Space is seeking a Senior FPGA Engineer specialized in onboard networking, cryptography and security to design the network fabric and security architecture of our next-generation spacecraft, to join our High Performance Compute (HPC) team. You'll define how data moves across the spacecraft, from sensor front-ends through payload compute to downlink, and how it stays secure, both in flight and end-to-end to the ground. This is a hands-on FPGA engineering role with strong architectural influence: you'll define the concepts, write the RTL, and work shoulder-to-shoulder with our Staff Architect, EE team, and payload engineers to bring your solutions to life. This position is hybrid and requires working on-site in our San Jose, CA office three days per week. Responsibilities * Define the onboard networking architecture for Muon spacecraft, including switching, routing, packet filtering, firewalling, deep packet inspection, and VPN concepts. * Define and implement end-to-end encryption, packet-based encryption at router level, file-based encryption for onboard and downlink data. * Drive the definition of an onboard Ethernet switching and routing device and evaluate implementation options (COTS, semi-custom, fully custom FPGA-based). * Design and build a spacecraft NoC (Network-on-Chip) and robust FPGA-to-FPGA links, with continuous link health monitoring and reporting. * Own the Ethernet PHY and MAC integration on FPGAs, link aggregation, and signal-integrity trade-offs, in close partnership with the HPC architecture and Electrical Engineering team. * Apply FEC schemes (e.g., Reed-Solomon) to onboard and inter-FPGA links; translate networking and coding requirements into implementable RTL. * Integrate the network fabric with customer payloads, ensuring interoperability and low-level link validation. * Publish white papers on Muon's networking and security solutions and represent this work internally and (where appropriate) externally. * Work hand-in-hand with the Staff Onboard Compute Architect on the team to harmonize networking and security into the broader compute architecture. ## Related Videos - [The Gashlycrumb Tinies of AI Networking You Must Know (or Languish!)](https://www.wearedevelopers.com/videos/2067-the-gashlycrumb-tinies-of-ai-networking-you-must-know-or-languish) - [Strange New Worlds: shaping the future of the digital age](https://www.wearedevelopers.com/videos/677-strange-new-worlds-shaping-the-future-of-the-digital-age) - [Playing Pong on a shoulder press machine](https://www.wearedevelopers.com/videos/100140-playing-pong-on-a-shoulder-press-machine) - [Agent Smith Gets Hardware: Autonomous IoT Hacking From Debug Port to Cloud API](https://www.wearedevelopers.com/videos/100258-agent-smith-gets-hardware-autonomous-iot-hacking-from-debug-port-to-cloud-api) - [Docker network without Docker](https://www.wearedevelopers.com/videos/1418-docker-network-without-docker) - [Cyber Sleuth: Finding Hidden Connections in Cyber Data](https://www.wearedevelopers.com/videos/893-cyber-sleuth-finding-hidden-connections-in-cyber-data) ## Related Articles - [How We Built a Worry-Free System That Runs for 10+ Years – And What We’d Do Again](https://www.wearedevelopers.com/magazine/751-how-we-built-a-worry-free-system-that-runs-for-10-years-and-what-we-d-do-again) - [Everything a Developer Needs to Know About MCP with Neo4j](https://www.wearedevelopers.com/magazine/604-everything-a-developer-needs-to-know-about-mcp-with-neo4j) - [Dev Digest 134 - Where pixels sing?](https://www.wearedevelopers.com/magazine/477-dev-digest-134-where-pixels-sing) - [Dev Digest 129 - Now that's what I call private data!](https://www.wearedevelopers.com/magazine/468-dev-digest-129-now-that-s-what-i-call-private-data) - [9 Ways to Make Money Hacking](https://www.wearedevelopers.com/magazine/333-9-ways-to-make-money-hacking) - [Dev Digest 162: AI careers, MCP, AWS best practices & floppy sweaters](https://www.wearedevelopers.com/magazine/571-dev-digest-162-ai-careers-mcp-aws-best-practices-floppy-sweaters)