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# Principal Front-End Design Automation (EDA/DevOps) Engineer

- **Company:** Ampere Computing
- **Location:** Portland, OR, United States
- **Experience:** Expert
- **Salary:** $225,500.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Cloud Computing, Computer Engineering, Continuous Integration, Relational Databases, Software Debugging, Linux, DevOps, Electronic Design Automation, Perl (Programming Language), Python (Programming Language), Perforce, SystemVerilog, Git, Information Technology, Slurm, Front End Software Development, Software Version Control
- **Published:** August 22, 2026
- **Apply:** https://www.dice.com/job-detail/1c876a05-b853-4ea7-be69-e3cf1dd441c2

## About the Role

* 8+ years of proven Front-End Design Automation (EDA/DevOps) expertise, in the technology sector (semiconductor design is preferred).
 * Highly talented Python or Perl scripting skills.
 * Strong SystemVerilog language expertise with background in DV/UVM/Coverage/Simulation/Debug and/or RTL static checks (Lint/CDC/RDC/UPF).
 * Solid experience with IP and SoC RTL design and verification workflows
 * Proven experience with HPC scheduling/workload management , like IBM LSF (Load Sharing Facility) or SLURM (Simple Linux Utility for Resource Management), for running EDA workloads.
 * Additional skills highly desired: SCM/Source Code Management; Git/Perforce; RDBMS; CI/CD; Cloud Computing

Education:

 * BS degree in Electrical Engineering, Computer Engineering, or Computer Science & 12 years of related experience, MS degree & 8 years, or PhD & 5 years

## Description

As a Sr. Principal Front-End Design Automation (EDA/DevOps) Engineer, you will strategically partner with Ampere's RTL and Verification organizations to drive measurable gains in pre-silicon productivity through scalable automation, systems, and platform capabilities. You will lead cross-functional initiatives spanning hardware, software, and IT, aligning with design, verification, EDA, and IT stakeholders. You will also provide expert guidance for EDA tooling and Ampere flows, architect internal tools, automate end-to-end workflows across on-prem and cloud, and scale infrastructure to improve design quality and expand AI impact in verification and design.

What You'll Achieve:

 * Provide expert tech guidance for EDA tools and Ampere design/verification flows, establishing standards and mechanisms that measurably improve productivity and reliability.
 * Collaborate with RTL design and verification teams to define and deploy new or improved methods of work.
 * Architect, document, deploy, and administer custom Ampere automation and services that streamline RTL design and verification, reducing cycle time and operational overhead for design teams.
 * Enable and support EDA tools used for RTL design and verification (SystemVerilog simulation, Lint, CDC, RDC, UPF, debug).
 * Partner with IT, EDA vendors, RTL design and verification teams to deliver high-performance, efficient solutions.
 * Drive AI-enabled automation for design and verification, accelerating analysis and decision-making while improving coverage and issue resolution speed.


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