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# Principal Front-End Design Automation (EDA/DevOps) Engineer

- **Company:** Ampere Computing
- **Location:** Portland, OR, United States
- **Experience:** Expert
- **Salary:** $182,000.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Cloud Computing, Computer Engineering, Continuous Integration, Relational Databases, Software Debugging, Linux, DevOps, Electronic Design Automation, Perl (Programming Language), Python (Programming Language), Perforce, SystemVerilog, Git, Information Technology, Slurm, Front End Software Development, Software Version Control
- **Published:** August 22, 2026
- **Apply:** https://www.dice.com/job-detail/97d823be-5505-4ae8-a0cf-37cd3ab06828

## About the Role

* 6+ years of proven Front-End Design Automation (EDA/DevOps) expertise, in the technology sector (semiconductor design is preferred).
 * Skilled in Python or Perl scripting.
 * Strong SystemVerilog language expertise with background in DV/UVM/Coverage/Simulation/Debug and/or RTL static checks (Lint/CDC/RDC/UPF).
 * Experience with IP and SoC RTL design and verification workflows.
 * Knowledgeable with HPC scheduling/workload management , like IBM LSF (Load Sharing Facility) or SLURM (Simple Linux Utility for Resourc.e Management), for running EDA workloads.
 * Additional skills highly desired: SCM/Source Code Management; Git/Perforce; RDBMS; CI/CD; Cloud Computing

Education:

 * BS degree in Electrical Engineering, Computer Engineering, or Computer Science & 8 years of related experience, MS degree & 6 years, or PhD & 3 years

## Description

As a Principal Front-End Design Automation (EDA/DevOps) Engineer, you will partner closely with Ampere's RTL and Verification organizations to drive measurable improvements in pre-silicon productivity through automation, systems, and platform capabilities. Collaborate with hardware, software, and IT stakeholders. You will also support EDA tooling guidance, architect or enhance internal tools, automate end-to-end workflows across on-prem and cloud, and contribute to infrastructure scaling to improve design quality and expand AI-enabled impact in verification and design.

What You'll Achieve:

 * Provide strong tech guidance for EDA tools and Ampere design/verification flows, establishing standards and mechanisms that measurably improve productivity and reliability.
 * Collaborate with RTL design and verification teams to define and deploy new or improved methods of work.
 * Deploy, and administer custom Ampere automation and services that streamline RTL design and verification, reducing cycle time and operational overhead for design teams.
 * Enable and support EDA tools used for RTL design and verification (SystemVerilog simulation, Lint, CDC, RDC, UPF, debug).
 * Connect with IT, EDA vendors, RTL design and verification teams to deliver high-performance, efficient solutions.


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